Spice Tips and Tricks

1
Spice Tips and Tricks
2
Spice was not developed for PE

• The spice program was developed for electronics
  (radio and other low power, audio, analog
  circuits, etc )
• So the components inside spice are not really
  suited for power electronics.

3
Can it be used for everything?

• People use the spice components to build "power
  electronics components", but there is always a
  'but'

4
Drawbacks of Spice (1)

• Simulation speed and convergence problems for
  large switching circuits in spice
• Slower because of complicated circuits to model a
  control (analog or digital)

5
Drawbacks of Spice (2)

• To many components inside a sub-circuit that
  model the power electronics component.
• Convergence problems for large circuits with fast
  switching transients

6
Focus of the simulation

• Therefore in Caspoc the focus is on components
  especially for power electronics

7
Advantages in Caspoc (1)

• fast ideal power semiconductor switch models,
• analog control blocks,
• electrical machines,
• mechanical load blocks
• Power electronics blocks like RMS, Average,
  Fourier Transform,

8
Advantages in Caspoc (2)

• Showing results also as Phasors (Arrows rotating
  on the screen)
• Digital control in C language
• Small signal analysis for SMPS (switched mode
  power supplies)

9
Spice for Power ElectronicsConvergence criteria
(1)

• Absolute convergence criteria
• uk)-uk-1 lt VNTOL
• ik)-ik-1 lt ABSTOL

10
Spice for Power ElectronicsConvergence criteria
(2)

• Relative convergence criteria
• Relative error control doesnt work when the
  voltage or current approaches zero!
• Convergence criteria
• uk-uk-1 lt uk RELTOL
• what if uk-1 is close to zero!!!!
• Minimum error is in that case given by VNTOL and
  ABSTOL!

11
Spice for Power ElectronicsConvergence criteria
(3)

• What are the convergence criteria?
• VNTOL ?????
• 0.1 of 1kVolt for the IGBT
• 0.1 of 1 volt for the mosfet gate driver
• Solution
• Separate simulation of the
• Driver circuit gt VNTOL 1mV
• Power circuit gt VNTOL 1V

12
Turn-off in SPICE

• Reduction of step size until convergence is
  reached
• A large number of time steps are required for
  convergence

13
Turn-off in Caspoc

• State Event
• Interpolation of the State Event
• Semi-exact calculation of the turn-off event

14
Netlist Tips and Tricks

• Netlist and commands overview
• Simulator principle
• Convergence tricks

15
Netlist and commands

• components
• commands

16
Simulator

• Newton Raphson
• Convergence problems

17
Convergence Tricks I

• Include damping by introducing R, L C
• C Resr
• L Rleak
• Diode Rs0.01 Cjo1p5
• BJT Rs0.1 Cje9p Cjc25p
• Gate pulse gt Trapezoidal
• UIC L C Diode
• Nodeset

18
Convergence Tricks II

• OFF force the device to be off at start
• Increase ITL1
• .Options ITL1500
• DC Sweep
• .Options ITL2500
• Transient
• .Options ITL4 100

19
Convergence Tricks III

• RELTOL 0.001 -- 0.01
• ABSTOL ReltolImin
• VNTOL ReltolVmin
• Use Gear instead of Trap to avoid oscillations

20
Convergence Tricks IV

• Xspice Ramptime
• Xspice Rshunt from every node to ground
• .options rshunt100meg
• DC stepping
• .options gmsteps10
• Source stepping (undocumented spice 2G6)
• .options ITL610 or srcsteps10

21
Schematic input
22
Simulator batch run
23
Browse output netlist
24
View simulation results