Substrate Bias Effect on Ge pMOSFETs with and without Halo PowerPoint PPT Presentation

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Title: Substrate Bias Effect on Ge pMOSFETs with and without Halo


1
Substrate Bias Effect on Ge pMOSFETs with and
without Halo
  • E. Simoen, E. Voroshazi, J. Mitard, G. Eneman1,
    D.P. Brunco2, B. De Jaeger and M. Meuris

IMEC, Kapeldreef 75, B-3001 Leuven, Belgium 1also
at EE Depart KU Leuven 2Intel assignee at IMEC
2
Outline
  • Introduction and Motivation
  • Experimental details
  • Results
  • Discussion
  • Conclusions

3
Introduction motivation
  • Development of short-channel
  • MOSFETs on Ge substrates
  • Requires halo implantations
  • for control of the SCE
  • -Optimize halo implantation con-
  • ditions (TAT BTBT leakage !)
  • Substrate bias sensitivity of
  • threshold voltage VT may provide
  • information on the depth profile
  • of the halo.

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Introduction principle
Substrate bias sensitivity may yield an average
value for the doping density Nd according to
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Experimental processing overview
  • BOX isolation
  • Ge/Si/SiO2/HfO2/TaN/TiN gate stack
  • NiGe and Al backend metallisation

6
Experimental details
  • Epitaxial 200 mm Ge-on-Si substrates (2 mm thick
    epi with a threading dislocation density of
    107-108 cm-2)
  • Halo 60 keV 4x1013 P/cm2 no halo reference
  • IS-VGS measurements in linear operation for
    reverse substrate bias VBS, for pMOSFETs with
    lengths varying from 10 to 0.125 mm
  • Linear extrapolation method at peak gm

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Experimental details measurement procedure
Increasing VBS yields a higher vertical field and
may cause degradation of the gate stack and a
change in VT. Limiting reverse VBS to 2 V
maximum avoids this problem
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Experimental details simulations
Process simulation was carried out by TSUPREM,
based on SRIM implan- tation profiles. Device
simulations were performed using MEDICI.
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Results VT versus L and VBS - no halo
Application of a reverse substrate bias
aggravates the SCE in no halo Ge pMOSFETs. For
the shortest lengths the VT is nearly
insensi- tive to VBS.
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Results VT versus L and VBS - halo
Application of a reverse substrate bias does not
affect VT vs L. This suggests a deep constant
halo, effectively suppressing SCE
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Results peak mobility - halo
Potential drawback is the reduction of the peak
effective mobility with reverse VBS, which is
more pronounced for shorter transistors. This
is due to the higher Coulomb scattering at
ionized halo dopant atoms.
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Discussion doping profile
There is a strong discrepancy between the
simulated and extracted substrate (halo) doping
profile. This points to a shortcoming of the
dVT/dVBS method, based on a simple 1D model
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Discussion VT vs VBS
There is qualitative agreement between simulated
and extracted data. Points to shortcomings in the
process/device simulation as well
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Conclusions
Halo doping is effective in suppressing SCE in
Ge pMOSFETs. The conditions employed here are
effective even for a reverse substrate bias of
1.5 V and for channel lengths down to 0.125
mm. The simple 1D model yields a substrate
doping profile which is much higher than what is
obtained from TSUPREM simulations. However, also
process and device simulations need further
optimisation for the case of Ge
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Outlook P-implant (Geert Hellings)
  • Phosphorus, 15 keV, 3e15 cm-2, 7 tilt
  • SRIM 100k ions, 17 min
  • Sentaurus amorphous (Taurus.MC) 10k ions, 10 sec
  • Sentaurus crystalline (Taurus.MC) 100k ions, 3
    min

Trimsrimtest/node 26
Trimsrimtest/node 28
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Acknowledgments
  • The Ge/III-V team at IMEC is greatly acknowledged
    for stimulating discussions.
  • Processing was performed in the IMEC 200 mm
    P-Line
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