A HighEfficient CMOS RF Power Amplifier With Automatic Adaptive Bias Control

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A High-Efficient CMOS RF Power AmplifierWith
Automatic Adaptive Bias Control
Chen, Y.-J.E. Liu, C.-Y. Luo, T.-N. Heo, D.
Microwave and Wireless Components Letters, IEEE
Volume 16,  Issue 11,  Nov. 2006 Page(s)615 -
617 Digital Object Identifier 10.1109/LMWC.2006.8
84909

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Outline

• Abstract
• Introduction
• the CMOS PA with the adaptive bias control
  circuit
• Simulation
• Measurement results
• Conclusions

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Abstract

• A 2.4-GHz Doherty power amplifier is developed in
  0.18- m CMOS technology
• Operated at 3 V, the P1dB and PAE of the PA are
  21 dBm and 33

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Introduction

• Specific data sequences will lead to a large
  peak-to-average power ratio (PAPR) of the output
  signal
• The Doherty PA architecture is a promising
  solution to the high PAPR issue since it can
  maintain high efficiency at the backoff output
  power
• A novel adaptive bias control circuit is proposed
  for the auxiliary PA biasing to enhance the
  efficiency and output power characteristics of
  the Doherty PA

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The CMOS PA with the adaptive bias control circuit
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Characteristics of adaptive bias voltage with
respect to input power for R1
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Characteristics of adaptive bias voltage with
respect to input power for R4
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Simulation
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(No Transcript)
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Measurement results

• The P1dB is 21.4 dBm and the corresponding PAE is
  33. The PAE at the power 6-dB backoff from P1dB
  is 21
• The measured PAE degradation due to 6-dB backoff
  from P1dB, ?(6 dB), of the CMOS Doherty PA is
  only 36

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Conclusions

• An automatic adaptive bias control circuit is
  integrated with the auxiliary PA to improve the
  performance of the Doherty PA