Integrated Stave Electrical and Assembly - PowerPoint PPT Presentation

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Integrated Stave Electrical and Assembly

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Title: Integrated Stave Electrical and Assembly


1
Integrated Stave Electrical and Assembly
  • ATLAS Upgrade Workshop
  • December 2007
  • H.Chen, J.Kierstad, Z. Li. D. Lissauer, D. Lynn,
    Y.Semetzvidis
  • Brookhaven National Laboratory
  • R.P. Ely, M.Gilchriese, C.Haber, B.Leung, T.Phung
  • Lawrence Berkeley National Lab
  • Anu Tuononen (Polytecnic Kuopio), Giulio Villani,
    Marc Weber
  • Rutherford Appelton Lab
  • Vitaliy Fadeyev, Jason Nielsen
  • SCIPP UC Santa Cruz

2
Prototypes and Designs
60 cm, 9 cm strip, 6 segments/side
Stave-06
1 meter, 3 cm strip, 30 segments/side 192 Watts
(ABCD chip), 2.4 Xo support structure
6 x 3 cm, 6 chips wide
Stave-07
Build and test
Study
1 meter, 2.5 cm strip, 40 segments/side 200-250
Watts (_at_0.25 W/chip) 1.9 2.2 Xo support
10 x 10 cm, 10 chips wide
Stave-08
3
What Has Been Done
  • Prototypes fabricated and studied
  • New DAQ system for multi-module tests
  • Stave-06
  • Stave-07
  • Transmission lines
  • Designs and concepts
  • Bus cables and signal distribution for Stave-08
    10 x 10
  • Material estimates
  • Bridged hybrid
  • Module overide and failure bypassing

4
New Stave Test DAQ
  • A bench top system easily configured for parallel
    testing large numbers of modules
  • Use off-the-shelf PXI based DAQ cards from
    National Instruments
  • PXI-656X 16 channels of LVDS I/O, multiple card
    system
  • 160 Mb/s system
  • Significant on-board memory/channel 2,16, or 128
    Mb/channel
  • But no hardware histogramming
  • Software StaveDAQ contains all the existing SCT
    tests
  • Noise interference and external trigger tests
    included
  • Configurable framework to handle any combination
    of components, multiple cards
  • Reporting, data access, and comparison tools

10-20-30 module system
5
StaveDAQ 6 chip plots
S-curve
Threshold scan
Strobe delay
VT50 Gain Out noise In noise
Performance vs channel _at_0.5 fc
6
Stave-06
  • Stave-06 results have been presented at the 2006
    Hiroshima and IEEE NSS meetings and published.
  • Good noise performance was demonstrated.
  • Noise interference was studied
  • Serial powering LVDS multidrop demonstrated on
    6 modules/hybrids
  • Stave-06 studies at LBL and RAL

7
Stave-07
  • The fabrication of Stave-07 (3 cm strip, DS) is
    underway
  • Mechanical parts are ready (see Gils talk)
  • Hybrid is ready
  • 1st module fabricated and under study
  • Assembly fixtures have been fabricated
  • Final fabrication is bus cable, design complete
  • Develop assembly and test procedure/fixtures,
    production-like
  • Goal is to have results for April 2008 review
  • Electrical performance
  • Mechanical and cooling
  • Assembly experience leading to work and time
    estimates for production
  • Cost and effort models

8
Development of Hybrid for Stave-07
  • Integrate 6 ABCD plus serial power, LVDS AC
    coupling
  • 63.54 x 15 mm on 375 micron BeO substrate
  • Components sized to hold off gt 150 volts
  • HV filtering and bypass
  • Integrated into full stave bus cable design
  • Redundant connections for testing

AC gnd
AG-MOD
HV Gnd
HV in
AV-MOD
9
Hybrid Design and Test
Analog current
Ground layer
Analog power
Power layer
Digital power
LVDS section
Serial power section
10
Module Assembly and Test Fixture
Evolve a single fixture for assembly, bonding,
inspection, and test.
11
Bus Cable
Data Readout 1/hybrid
Serial current return
Clock Command lines
Serial current link
HV distribution
12
Bus Cable Geometry and Impedance
Materials Al foil 2mil, Dupont LF0100, Shinetsu
CA333 2 mils, Cu 18 um, Kapton 1 mil, Adhesive
2
Al
1
ADHESIVE
1
1
0.7
Cu
1
KAPTON
1
CF
gtgtMatches measured impedance
Couple this to further measurements see
J.Nielsen talk of 12/11
13
Specific Goals of Study
  • Performance on standard SCT tests
  • Noise interference
  • Behavior of serial powering with large number of
    modules
  • HV bypass, coupling, in serial system
  • Clock and command distribution, transmission
    performance
  • Input to ABC-next design

If the Stave-07 program is successful and the
community wants to proceed in this general
direction then Stave-08 would follow but this
should be a broader effort. In the meantime we
would do limited studies related to Stave-08
14
Stave-08 Options and Studies
  • Mechanical/thermal study showed that bridge and
    hermeticity are options
  • Hybrid/Module
  • If we glue directly to silicon we want a low e
    dielectric substrate
  • BeO thick film was a readily available choice
    for Stave-07
  • If we bridge then other considerations can
    dominate
  • Material, cost, thermal
  • Kapton copper may be a more natural choice,
    even for direct gluing on silicon
  • Less material
  • Easier to connect to bus cable?
  • For direct glue still use a BeO substrate below
    kapton
  • Glue-on-silicon study can this be done in a
    definitive way?
  • Consideration of electrical failure recovery and
    bypassing
  • Bus Cable
  • Natural impedance is in the 65-75 ohm range
  • How should TTC be distributed? Multidrops
  • Do we need to zig-zag traces to minimize
    coupling?
  • How thick should the shield be? How should
    shield be grounded?
  • Wirebond or direct connections?

15
Design of Bus for 10 x10 Sensors
If diagonal lines not required have 40 open
space
16
Material
  • Contribution of mechanical core cooling 0.4
    (Gils talk)
  • Consider BeO hybrids on surface and KaptonCC
    bridge
  • Include all electrical components
  • Hybrids
  • Chips
  • Discrete components
  • Bus cables
  • BeO on surface 2 x 0.89 1.8 ( mechanical)
    2.2
  • Kapton CC 2 x 0.75 1.5 (mechanical)
    1.9
  • Support cylinder not included

17
Stave Review Considerations
  • With a review in 4-2008 all information will be
    based upon
  • Design studies
  • Stave-06, 07 experience
  • Process of addressing review panels detailed list
  • Specifics
  • Xo
  • Bridge / no Bridge
  • Electrical performance
  • Tracking performance
  • Radial plane separation, stereo measurement
  • Alignment
  • Hermeticity
  • Cost
  • Assembly procedure and tooling
  • Repair
  • Compatibility with forward designs
  • Special materials and processes

18
Required Information
  1. Stereo measurement precision (16mm(rf), 500mm(z)
    max separation between planes?)
  2. Need to describe here how the precision is
    maintained over the full tracking volume
    (assembly precision, survey, stability,
    monitoring, alignment) RESPONSE description of
    measurement, tooling, QA, process.
  3. Readout and electronics based on system
    architecture document consistent with options
    under evaluation. Supply details of
  4. Grounding scheme RESPONSE description of bus
    cable for serial and DC-DC.
  5. Powering scheme(s) RESPONSE key aspect of RD
    underway
  6. Monitoring RESPONSE factor into design of bus
    cable
  7. Compatibility with reuse of existing services
  8. Requirement for any new services to be detailed
    RESPONSE common to all schemes
  9. Radiation qualification of all materials and
    assemblies. Describe qualification measurements
    RESPONSE qualification of adhesives, carbon
    materials, issue of direct gluing to silicon
  10. Compatibility with trigger requirements - rf
    position of strips known to

19
Performance Information
  • Material per tracking layer in radiation lengths
    including
  • Module/stave 1.9 2.4
  • Overlaps to achieve hermeticity below see
    mechanical talk, determined by bias ring width
  • Attachments to external support structure
    assumed support structure TBD
  • Attachments to cooling, the cooling pipe
    including connections none, embedded, issue of
    coupling to external is common
  • Electrical connectors and intermediate services
    independent
  • Hermeticity of each layer i.e. fraction of tracks
    fully measured if overlaps then common to all
    schemes, otherwise need to calculate
  • Precision achieved for the whole tracker
  • Thermal run-away margin see mechanical /
    cooling

20
Risks Electrical Assembly
  • Identify components which are single-source
    limited sources for hybrids BeO or Kapton
  • List components or assembly steps which need to
    be developed or qualified
  • Front side gluing
  • Are electrical connections wirebonded, soldered,
    or connectors?
  • Assembly process needs to further developed and
    qualified
  • How deep is the assembly pipeline? level of
    prototyping effort required to fully validate
    design? Would clearly have to build full-scale
    prototype(s) for electrical performance and
    alignment
  • Risk due to tight mechanical tolerances during
    assembly Moderate, similar to past experience
  • Grounding shielding risks key aspect of the
    electrical study, bus cable, HV and bypass
  • Options available for repair i.e. the risk of
    damage being unrepairable.
  • Module/stave damaged during shipping or testing
    Replace module or toss out
  • Module/stave damaged during assembly to
    structures Replace module or toss out
  • Flexibility or options to modify the design based
    on experience with ATLAS.
  • Could the material be reduced further? And at
    what cost? Only if granularity is reduced
  • Could additional measurement layers be
    introduced? Sure
  • Are there options to improve grounding and
    shielding? Increase bus cable shield, various
    grounding options are included in prototyping
  • Other technical, schedule or financial risks
  • Design of bus cable and signal transmission
    issues
  • Need to decide on number of TTC, data lines
  • Bridge or No-Bridge, effect of glue on silicon

21
Summary Conclusions
  • Steady program of measurements, prototypes, and
    design study
  • Look forward to key measurements from Stave-07
  • Serial powering with 30 steps
  • Signal transmission
  • Electrical performance, grounding and shielding
  • Valuable inputs to production, assembly basis,
    cost estimates
  • Have addressed some key concerns raised by the
    community
  • Repair
  • Hermeticity
  • Bridge
  • Embedding this work in Review Committee framework
  • Clear program for future work if this is a good
    direction
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