Computer Architecture And Organization

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Computer Architecture And Organization

• Pages and Segmentation

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Paging

• Logical address space of a process can be
  noncontiguous process is allocated physical
  memory whenever the latter is available
• Divide physical memory into fixed-sized blocks
  called frames (size is power of 2, between 512
  bytes and 8,192 bytes)
• Divide logical memory into blocks of same size
  called pages
• Keep track of all free frames
• To run a program of size n pages, need to find n
  free frames and load program
• Set up a page table to translate logical to
  physical addresses
• Internal fragmentation

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Address Translation Scheme

• Address generated by CPU is divided into
• Page number (p) used as an index into a page
  table which contains base address of each page in
  physical memory
• Page offset (d) combined with base address to
  define the physical memory address that is sent
  to the memory unit
• For given logical address space 2m and page size
  2n

page number
page offset
p
d
m - n
n
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Representative Organization of a Page Table
Page Page Presence
Change Access Address Frame
bit P bit C
rights
A 0
1 0
R, X
C D6C7T9
0
R, W, X E
24 1
1
R, W, X F 16
1 0
R
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Segmentation

• Memory-management scheme that supports user view
  of memory
• A program is a collection of segments
• A segment is a logical unit such as
• main program
• procedure
• function
• method
• object
• local variables, global variables
• common block
• stack
• symbol table
• arrays

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Segmentation

• A virtual address in a segmented system is made
  from 2 parts
• segment number
• displacement within (S,D) pairs
• unlike paging, segments are not fixed length,
  maybe variable
• Segments store complete entities - pages allow
  objects to be split

• Each task has its own segment table
• segment table contains base address and length of
  segment so that other segments arent corrupted

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Two-Stage address translation with segments and
pages
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Segmentation with paging

• modern computers use a combination of
  segmentation and paging
• solve the external fragmentation problem by
  paging the segments
• segment-table entry contains not the base address
  of the segment, but rather the base address of a
  page table for the segment

• example Intel Pentium
• utilizes both pure segmentation and segmentation
  with paging
• the segmentation and paging units act in sequence
  to map a logical address to physical memory

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Translation look-aside buffer

• can reduce to a single memory access using an
  associative array
• Translation Look-aside Buffer (TLB) provides
  constant-time access to frame number given page
  number (using a parallel search)

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Intel Pentium address translation

• Case Study

Can cover up to 4 MBphysical address space
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Page Replacement Policies

• 3 major page replacement policies
• FIFO
• LRU
• OPT

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• FIFO(first in first out) With FIFO, the oldest
  page in memory is selected for replacement
• LRU (least recently used) - a policy that
  selects the page that has gone unused for the
  longest period of time.
• OPT(optimal replacement policy) - In this policy
  we will replace the memory with the page address
  which we will not use in the near future

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