Jau-Wen Lin, Ph. D. Six Level of Interconnection

1
IC Fabrication An Introduction

• Jau-Wen Lin, Ph. D.

2
Integrated circuit showing memory blocks, logic
and input/output pads around the periphery
3
(No Transcript)
4
(No Transcript)
5
Six Level of Interconnection
6
IC device
7
(No Transcript)
8
Semiconductor Applications

• 3C Computer--- /Communication / Consumables
  
• Personal Computer--- Desktop Computer (DT) /
  Notebook (NB)
• Communication--- ADSL / Cable
  Modem / IEEE802.11X /
  Bluetooth / VoIP
• Consumables--- Game / DVD /
  Digital Camera
• 3C merge--- Digital Home

9
Types of Chips

• Dynamic Random Access Memory chips (DRAMs) -
  serve as the primary memory for computers
• Microprocessors (MPUs) - act as the brains of
  computers.
• Application Specific Integrated Circuits (ASICs)
  - are custom semiconductors designed for very
  specific functions
• Digital Signal Processors (DSPs) - process
  signals, such as image and sound signals or radar
  pulses.
• Programmable memory chips (EPROMs, EEPROMs, and
  Flash) - are used to perform functions that
  require programming on the chip.

10
(No Transcript)
11
Semiconductor Fabrication Processes

• Front-End Processing (Wafer fabrication)
• Back-End Processing (Assembly and Testing)

12
Logic Circuit Design / Layout Design

• A logic circuit diagram is drawn to
  determine the electronic circuit required for the
  requested function.
• Once the logic circuit diagram is complete,
  simulations are performed multiple times to test
  the circuits operation.

13
Photomask Creation

• The photomask is a copy of the circuit pattern,
  drawn on a glass plate coated with a metallic
  film.
• The glass plate lets light pass, but the metallic
  film does not.
• Due to increasingly high integration and
  miniaturization of the pattern, the size of the
  photomask is usually magnified four to ten times
  the actual size.

14
The photomask of a RF IC Chip
15
Wafer Fabrication

• A high-purity, single-crystal silicon called
  "99.999999999 (eleven-nine)" is grown from a
  seed to an ingot.
• The wafers are generally available in diameters
  of 150 mm, 200 mm, or 300 mm, and are
  mirror-polished and rinsed before shipment from
  the wafer manufacturer.

16
Deposition

• the wafer is placed in a high-temperature furnace
  to make the silicon react with oxygen or water
  vapor, and to develop oxide films on the wafer
  surface (thermal oxidation).
• To develop nitride films and polysilicon films,
  the chemical vapor deposition (CVD) method is
  used, in which a gaseous reactant is introduced
  to the silicon substrate, and chemical reaction
  produce the deposited layer material.
• The metallic layers used in the wiring of the
  circuit are also formed by CVD, spattering (PVD
  physical vapor deposition)

17
Photoresist Coating

• A resin called "photoresist" is coated over the
  entire wafer. (1µm thick coating.)
• Photoresist is a special resin similar in
  behavior to photography films that changes
  properties when exposed to light.

18
Masking/Exposure

• Placed over the photoresist-coated wafer, which
  is then irradiated to have the circuit diagram
  transcribed onto it.
• An irradiation device called the "stepper" is
  used to irradiate the wafer through the mask with
  ultraviolet (UV) light.

19
Lithography area in clean room
20
(No Transcript)
21
Patterning Development

• The photoresist chemically reacts and dissolves
  in the developing solution, only on the parts
  that were not masked during exposure (positive
  method).
• Development is performed with an alkaline
  developing solution.
• After the development, photoresist is left on the
  wafer surface in the shape of the mask pattern.

22
Etching

• "Etching" refers to the physical or chemical
  etching of oxide films and metallic films using
  the resist pattern as a mask.
• Etching with liquid chemicals is called "wet
  etching" and etching with gas is called "dry
  etching".

23
(No Transcript)
24
Photoresist Stripping

• The photoresist remaining on the wafer surface is
  no longer necessary after etching is complete.
  Ashing by oxygen plasma or the likes is performed
  to remove the residual photoresist.

25
Device Insulation Layer (Field-Oxide Film)
Formation

• After the oxide film and nitride film are
  developed, a resist pattern is formed on the
  regions that will become the device insulation
  layer.
• Ion implantation is performed on the wafer,
  forming a p-type diffusion layer.
• Next, the oxide film and nitride film on the
  diffusion layer are etched.
• Using the nitride film pattern as the mask, the
  oxide film that will become the device insulation
  layer is developed.

26
(No Transcript)
27
Transistor Formation

• A transistor is a semiconductor device with a
  switching function and three terminals source,
  drain, and gate.
• An insulation layer called "gate oxide" is first
  formed on the wafer surface.
• A polysilicon film is deposited onto the gate
  oxide, and a polysilicon gate for controlling the
  flow of electrons between the source region and
  the drain region is formed by lithography and
  etching.
• After the polysilicon gate is formed, an n-type
  diffusion layer consisting of both the source and
  the drain regions is formed by implantation of
  impurities

28
Polysilicon Gate Cross-Section Image
29
Metallization

• Interconnecting the devices, such as transistors,
  formed on the silicon wafer completes the
  circuit.
• the wafer is first covered with a thick and flat
  interlayer insulation film (oxide film). Next,
  contact holes are drilled by lithograph and
  etching, through the interlayer insulation film,
  above the devices to be connected.

Nine-layer Copper Interconnect Architecture
30
Wafer Inspection

• Each IC on the completed wafer is electronically
  tested by the tester.
• After this inspection, the front-end processing
  is complete.

31
(No Transcript)
32
Dicing

• In back end processing, a wafer completed in
  front end processing is cut into individual IC
  chips and encapsulated into packages.

33
Mounting

• After the IC chips are cut apart, they are sealed
  into packages. The IC chips must first be
  attached to a platform called the "lead frame.

34
Wire bonding

• The mounted IC chips are connected to the lead
  frames.

35
Encapsulation

• The IC chips and the lead frame islands are
  encapsulated with molding resin for protection.

36
Characteristic Selection

• The packaged IC chips are tested and selected.

37
Printing and Lead Finish

• The final step of IC chip manufacturing is the
  printing onto the package surface and the
  finishing of leads. After this step, the IC chips
  are complete.