CFT Hardware

1
CFT Hardware

• Scintillating fibers, light guides
• VLPC chips-Visible Light Photon Counters
• 9600 chips for CFT
• 12608 chips for CFTCPSFPS
• 100864 individual pixels (12608 chips8
  pixels/chip)
• SIFT chips-
• SVX chips

Scintillating fiber
Light guide
trigger
VLPC
SIFT
SVX
2
Monitoring and CalibrationGoals and Means

• Detection and diagnostics of broken, inefficient,
  or malfunctioning channels (fibers, light
  guides, electronics)
• Setting and control of operating parameters
• VLPC bias and temperature
• SIFT threshold
• SVX threshold
• LED light injected into the system
• Pulse height spectra measured in SVX chips
• The background simulated by second (so called
  background) LED

3
Testing of VLPC chips now at Boeing

• LED illuminate VLPC chips
• Camac crate with LeCroy ADCs
• NIM electronics
• Windows NT Workstation with two CPUs
• DAQ Object Oriented Program based on Microsoft
  Foundation Classes
• Two CPUs use MINUIT to fit pulse height spectra
  of every pixel to four gaussian peaks
• Access Database

pedestal
signal
4
Starting in AutumnCalibrating in Lab. 3

• LED induced spectra measured with and without
  background LED
• DAQ
• Embedded processors in VME crates with VRB
  modules and DART Fermilab Acquisition System.
  DART will be running in DØ for silicon tests.
  Also EPICS needed to download SVX chips
• Window NT-Paul Padley DAQ
• Database?

S B
Scintillating fiber
LEDs
Light guide
Signal Background
VLPC
SIFT
SVX
5
Setting and Control ofVLPC bias, SVX threshold

• Temperature, will be determined at Boeing, it is
  part of chips characterization
• Bias for VLPC chips, threshold for SVX chips
• Bias the bias at which chips efficiency is
  maximum.
• Both determined at Boeing at the rate of 20 MHz
  of single photoelectrons, LED generated
  background
• Both checked during test in Lab. 3
• We would like to repeat this in dedicated
  calibration runs during the store.

6
Calibration Runs in Run IIPedestal runs

• Goal Detection of dead and noisy channels
• Bias on VLPC chips set to 4.0 V
• Measured pulse height distributions with the use
  of SVX chips. The quantities calculated are
• Mean of pulse height distribution
• RMS of pulse height distribution
• These runs are done outside the store

2100864 numbers
7
Calibration Runs in Run IILED runs

• Goalto detail the performance of each chip
• Measured pulse height distributions for each
  pixel
• Dark current pulse height distributions
• LED-ON pulse height distributions
• Outside store
• During store. Minimum 40000 triggers needed. No
  background LED
• LED timing such that signal induced by LED comes
  in abort gap
• Fired LED generates L1 accept, L2 accept and L3
  accept
• Analysis compares Beam OFF and Beam ON pulse
  height spectra
• Gains and relative QE found by fitting pulse
  height distributions to multigaussian
  distributions
• Paul Padley using two processors, each 233 MHz
  fits 15 chips in 5 minutes
  12608 chips(5min/15chips) 2.9 days

2100864 histograms stored and analyzed