Lecture 5: Conditional Sum, Parallel Prefix Adders

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ECE 645 Lecture 3
Conditional-Sum Adders and Parallel Prefix
Network Adders
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Required Reading
Behrooz Parhami, Computer Arithmetic Algorithms
and Hardware Design
Chapter 7.4, Conditional-Sum Adder Chapter 6.4,
Carry Determination as Prefix Computation Chapter
6.5, Alternative Parallel Prefix Networks
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Conditional-Sum Adders
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One-level k-bit Carry-Select Adder
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Two-level k-bit Carry Select Adder
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Conditional Sum Adder

• Extension of carry-select adder
• Carry select adder
• One-level using k/2-bit adders
• Two-level using k/4-bit adders
• Three-level using k/8-bit adders
• Etc.
• Assuming k is a power of two, eventually have an
  extreme where there are log2k-levels using 1-bit
  adders
• This is a conditional sum adder

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Conditional Sum AdderTop-Level Block for One
Bit Position
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Three Levels of a Conditional Sum Adder
xi3
yi3
xi2
yi2
xi1
yi1
xi
yi
branch point
1-bit conditional sum block
concatenation
c0
c1
c0
c1
c1
c1
c0
c0
2
2
2
2
2
2
2
2
1
1
11
1
1
2
2
1
2
2
1
1
1
c0
c0
c1
c1
3
3
3
3
1
21
1
2
2
3
3
block carry-indetermines selection
5
41
5
c0
c1
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16-Bit Conditional Sum Adder Example
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Conditional Sum Adder Metrics
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Parallel Prefix Network Adders
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Parallel Prefix Network Adders
Basic component - Carry operator (1)
g
p
B
B
B
g
p
g
p
g g gp p pp
(g, p) (g, p) (g, p) (g gp, pp)
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Parallel Prefix Network Adders
Basic component - Carry operator (2)
g
p
overlap okay!
B
B
B
g
p
g
p
g g gp p pp
(g, p) (g, p) (g, p) (g gp, pp)
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Properties of the carry operator
Associative
(g1, p1) (g2, p2) (g3, p3) (g1, p1)
(g2, p2) (g3, p3)
Not commutative
(g1, p1) (g2, p2) ? (g2, p2) (g1, p1)
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Parallel Prefix Network Adders
Major concept
Given
(g0, p0) (g1, p1) (g2, p2)
. (gk-1, pk-1)
Find
(g0,0, p0,0) (g0,1, p0,1) (g0,2,
p0,2) (g0,k-1, p0,k-1)
block generate from index 0 to k-1
ci g0,i-1 c0p0,i-1
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Similar to Parallel Prefix Sum Problem
Parallel Prefix Sum Problem
Given
x0 x1 x2
xk-1
Find
x0 x0x1 x0x1x2 x0x1x2 xk-1
Parallel Prefix Adder Problem
Given
x0 x1 x2
xk-1
Find
x0 x0 x1 x0 x1 x2 x0 x1 x2
xk-1
where xi (gi, pi)
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Parallel Prefix Sums Network I
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Parallel Prefix Sums Network I Cost (Area)
Analysis
Cost C(k) 2 C(k/2) k/2
2 2C(k/4) k/4 k/2 4 C(k/4) k/2
k/2 .
2 log k-1C(2) k/2 (log2k-1)
k/2 log2k
2
C(2) 1
Example
C(16) 2 C(8) 8 22 C(4) 4 8
4 C(4) 16 4 2 C(2) 2 16
8 C(2) 24 8 24 32 (16/2) log2 16
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Parallel Prefix Sums Network I Delay Analysis
Delay D(k) D(k/2) 1
D(k/4) 1 1 D(k/4) 1 1
. log2k
D(2) 1
Example
D(16) D(8) 1 D(4) 1 1
D(4) 2 D(2) 1 2 4 log2
16
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Parallel Prefix Sums Network II (Brent-Kung)
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Parallel Prefix Sums Network II Cost (Area)
Analysis
Cost C(k) C(k/2) k-1
C(k/4) k/2-1 k-1 C(k/4) 3k/2 - 2
.
C(2) (2k - 2k/2(log k-1)) - (log2k-1)
2k - 2 - log2k
2
C(2) 1
Example
C(16) C(8) 16-1 C(4) 8-1 16-1
C(2) 4-1 24-2 1 28 - 3 26
216 - 2 - log216
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Parallel Prefix Sums Network II Delay Analysis
Delay D(k) D(k/2) 2
D(k/4) 2 2 D(k/4) 2 2
. 2 log2k - 1
D(2) 1
Example
D(16) D(8) 2 D(4) 2 2
D(4) 4 D(2) 2 4 7 2
log2 16 - 1
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8-bit Brent-Kung Parallel Prefix Network
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4-bit Brent-Kung Parallel Prefix Network
x1
x3
x5
x7
2 bit B-K PPN
s1
s3
s5
s7
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8-bit Brent-Kung Parallel Prefix Network Adder
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Critical Path
gi xi yi pi xi ? yi
1 gate delay
g g g p p p p
2 gate delays
ci1 g0,i c0 p0,i
2 gate delays
si pi ? ci
1 gate delay
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Brent-Kung Parallel Prefix Graph for 16 Inputs
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Kogge-Stone Parallel Prefix Graph for 16 Inputs
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Parallel Prefix Network Adders
Comparison of architectures
Hybrid
Network 2 Brent-Kung
Kogge-Stone
Delay(k)
2 log2k - 2
log2k1
log2k
Cost(k)
2k - 2 - log2k
k/2 log2k
k log2k - k 1
6
5
Delay(16)
4
32
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Cost(16)
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Delay(32)
8
6
5
80
129
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Cost(32)
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Latency vs. Area Tradeoff
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Hybrid Brent-Kung/Kogge-Stone Parallel Prefix
Graph for 16 Inputs