ECE449

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ECE449

• Dr. John G. Weber
• KL-241E
• 229-3182
• John.Weber_at_notes.udayton.edu

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Syllabus

• Computer Systems Engineering. An Introduction to
  advanced computer architecture and computer
  systems design. Topics include exploration of
  principle architectural features of modern
  computers, pipelining, memory hierarchy, I/O
  devices, interconnection networks, introduction
  to parallel and multiprocessing systems, and the
  use of Hardware Descriptive Languages (HDLs) in
  system implementation.
• Prerequisites ECE 314 and CPS 346, or
  permission of instructor.
• Credits 3 
• Required TextbookVincent P. Heuring and Harry F.
  Jordan, Computer Systems Design and
  ArchitectureSecond Edition, Prentice Hall,
  2004.
• Recommended Additional Textbook Michael D.
  Ciletti, Advanced Digital Design with the Verilog
  HDL, Prentice Hall 2003.

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Goals
The student will be expected to develop the
knowledge and design skills required to actively
participate in the development of sophisticated
computer systems. Coverage of computer hardware
will include both RISC and CISC machine concepts.
Hardware and software design skills will be
emphasized individually and in combination.
Students will be expected to demonstrate
competence in fundamental matters relating to
theory, design, and implementation. The course
will consist of a combination of lectures
emphasizing basic principles and related
applications followed by significant hands-on
design projects completed by the students.
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Course Outline

• Introduction and Review of Computer Architecture
  Assembly Language.
• Computer Building Blocks Memory, ALU, I/O, Data
  Paths
• Control Unit Design including RTL
• Pipelining
• I/O Devices and Interfacing
• System Interconnection architectures
• Advanced Organization Co-processors,
  multi-pipelined architectures, multi-processors

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Assignments and Grading

• Course will be structured as a combined lecture
  and laboratory
• Laboratory design projects provide an opportunity
  to design machine components and create a working
  computer
• Grade will be based on mid-term, final, and
  design projects
• Design Projects
• Building Blocks
• Registers
• General Register Set
• Memory
• ALU
• Simple Computer Control Unit
• Final Project Computer

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A Perspective

• Alan Turing showed that an abstract computer, a
  Turing machine, can compute any function that is
  computable by any means
• A general purpose computer with enough memory is
  equivalent to a Turing machine
• Over 50 years, computers have evolved
• from memory size of 1 kiloword (1024 words) clock
  periods of 1 millisecond (0.001 s)
• to memory size of a terabyte (240 bytes) and
  clock periods of 1 ns (10-9 s)
• More speed and capacity is needed for many
  applications, such as real-time 3D animation

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The Users View of a Computer
The user sees software, speed, storage
capacity, and peripheral device functionality.
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Machine/Assembly Language Programmers View

• Machine language
• Set of fundamental instructions the machine can
  execute
• Expressed as a pattern of 1s and 0s
• Assembly language
• Alphanumeric equivalent of machine language
• Mnemonics more human-oriented than 1s and 0s
• Assembler
• Computer program that transliterates (one-to-one
  mapping) assembly to machine language
• Computers native language is machine/assembly
  language
• Programmer, as used in this course, means
  machine/assembly language programmer
• This view is sometimes used to define the
  Architecture of the computer

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Machine and Assembly Language

• The assembler converts assembly language to
  machine language. You must also know how to do
  this.

Op code
Data reg. 5
Data reg. 4
MC68000 Assembly Language
Machine Language
0011 101 000 000 100
MOVE.W D4, D5
ADDI.W 9, D2
0000 000 010 111 100
0000 0000 0000 1001
Two Motorola MC68000 Instructions
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The Stored Program Concept
The stored program concept says that the
program is stored with data in the computers
memory. The computer is able to manipulate it as
datafor example, to load it from disk, move it
in memory, and store it back on disk.

• It is the basic operating principle for every
  computer.
• It is so common that it is taken for granted.
• Without it, every instruction would have to be
  initiated manually.

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Programmers ModelInstruction Set Architecture
(ISA)

• Instruction set the collection of all machine
  operations.
• Programmer sees set of instructions, along with
  the machine resources manipulated by them.
• ISA includes
• Instruction set,
• Memory, and
• Programmer-accessible registers of the system.
• There may be temporary or scratch-pad memory used
  to implement some function is not part of ISA.
• Not Programmer Accessible.

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Programmers Models of 4 Commercial Machines
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Machine, Processor, and Memory State

• The Machine State contents of all registers in
  system, accessible to programmer or not
• The Processor State registers internal to the
  CPU
• The Memory State contents of registers in the
  memory system
• State is used in the formal finite state
  machine sense
• Maintaining or restoring the machine and
  processor state is important to many operations,
  especially procedure calls and interrupts

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Data Type HLL Versus Machine Language

• HLLs provide type checking
• Verifies proper use of variables at compile time
• Allows compiler to determine memory requirements
• Helps detect bad programming practices
• Most machines have no type checking
• The machine sees only strings of bits
• Instructions interpret the strings as a type
  usually limited to signed or unsigned integers
  and FP numbers
• A given 32-bit word might be an instruction, an
  integer, a FP number, or 4 ASCII characters

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Instruction Classes

• This compiler
• Maps C integers to 32-bit VAX integers
• Maps C assign, , and to VAX MOV, MPY, and ADD
• Maps C goto to VAX BR instruction
• The compiler writer must develop this mapping for
  each language-machine pair

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Tools of the Assembly Language Programmers Trade

• The assembler
• The linker
• The debugger or monitor
• The development system

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Who Uses Assembly Language

• The machine designer
• Must implement and trade off instruction
  functionality
• The compiler writer
• Must generate machine language from a HLL
• The writer of time or space critical code
• Performance goals may force program-specific
  optimizations of the assembly language
• Special purpose or embedded processor programmers
• Special functions and heavy dependence on unique
  I/O devices can make HLLs useless

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The Computer Architects View

• Architect is concerned with design performance
• Designs the ISA for optimum programming utility
  and optimum performance of implementation
• Designs the hardware for best implementation of
  the instructions
• Uses performance measurement tools, such as
  benchmark programs, to see that goals are met
• Balances performance of building blocks such as
  CPU, memory, I/O devices, and interconnections
• Meets performance goals at lowest cost

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Tools of the Architects Trade

• Software models, simulators and emulators
• Performance benchmark programs
• Specialized measurement programs
• Data flow and bottleneck analysis
• Subsystem balance analysis
• Parts, manufacturing, and testing cost analysis

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Logic Designers View

• Designs the machine at the logic gate level
• The design determines whether the architect meets
  cost and performance goals
• Architect and logic designer may be a single
  person or team

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Implementation Domains
An implementation domain is the collection
of devices, logic levels, etc. which the designer
uses.
Possible implementation domains

• VLSI on silicon
• TTL or ECL chips
• Gallium arsenide chips
• PLAs or sea-of-gates arrays
• Fluidic logic or optical switches

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Three Implementation Domains for the 2-1
Multiplexer

• 2-1 multiplexer in three different implementation
  domains
• Generic logic gates (abstract domain)
• National Semiconductor FAST Advanced Schottky TTL
  (VLSI on Si)
• Fiber optic directional coupler switch (optical
  signals in LiNbO3)

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The Distinction Between Classical Logic Design
andComputer Logic Design

• The entire computer is too complex for
  traditional FSM design techniques
• FSM techniques can be used in the small (for
  example, in a sequencer that controls instruction
  fetch)
• There is a natural separation between data and
  control
• Data path storage cells, arithmetic, and their
  connections
• Control path logic that manages data path
  information flow
• Well defined logic blocks are used repeatedly
• Multiplexers, decoders, adders, etc.

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Two Views of the CPU PC Register
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Tools of the Logic Designers Trade

• Computer-aided design tools
• Logic design and simulation packages
• Printed circuit layout tools
• IC (integrated circuit) design and layout tools
• Logic analyzers and oscilloscopes
• Hardware development system

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Historical Generations

• 1st Generation 194659, vacuum tubes, relays,
  mercury delay lines
• 2nd generation 195964, discrete transistors and
  magnetic cores
• 3rd generation 196475, small- and medium-scale
  integrated circuits
• 4th generation 1975present, single-chip
  microcomputer
• Integration scale components per chip
• Small 10100
• Medium 1001,000
• Large 100010,000
• Very large greater than 10,000

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Von Neuman View of the Computer
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How does it operate?

• Basic Flow of a Stored Program Machine
• Instruction Fetch
• Operand Fetch (not in all operations)
• Execution of the Operation
• Operand Store (not in all operations)
• Next Instruction Set-up

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The Fetch-Execute Process
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The Control Unit

• Control Unit is a sequential machine which
  manages the resources of the computer to execute
  correctly written programs
• Control unit may take many forms (hardwired,
  micro-programmed, pipelined, etc)
• We will look first at simple implementations and
  move to pipelined units

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Register Transfer Language

• Provides a formal method of describing sequential
  operations
• Can be used to design state machines
• We will use to specify the control unit operation
• Many variations
• Book uses a version of a notation called ISP
• We will use a slightly different one that
  provides more of a correspondence with the
  sequential hardware design
• AHPL developed by Hill and Petersen

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Assignment

• Read Chapters 1,2, and 3 for background