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Breakout thoughts compiled with N. Carter:

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As it is too easy to cheat in software only models - starting from a 'hardware' ... Has extra benefits of: avoid the bother or cost of FPGA HW initially, and ... – PowerPoint PPT presentation

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Title: Breakout thoughts compiled with N. Carter:


1
Breakout thoughts (compiled with N. Carter)
  • Where will RAMP be in 3-5 Years (What is RAMP,
    where is it going?)
  • Is it still RAMP if it is mapping onto something
    other than FPGA?
  • Can we revert back to software simulation?
  • Is RAMP cost effective with current Parallel HW
    (different 5 years ago).
  • Now possible to build a 1K system with blades
  • ex Niagara has 64 threads - could simulate 1K
    cores with 16 blades?
  • Probably can get a 50 CPU cluster for "industry
    cost" of BEE3, 50K.
  • Maybe 1K per core.

2
Breakout thoughts
  • On Clusters
  • For thoughput limited runs (lots of independent
    simulation runs) - ex generating 3000 data
    points
  • then a cluster with many CPUs each working
    separately
  • For low latency single run - network latency will
    dominate and result in low emulation performance.
  • In all of these software approaches
  • There is a big issue of the mismatch between
    host and target. For good matches (ISA,
    network, memory system) can be efficient.
  • FPGA because of fine grain configurability
    largely avoids this issue.
  • But are these processor based emulations still
    "RAMP" systems?

3
Breakout thoughts
  • Perhaps what makes it RAMP is the design
    representation not the host.
  • There may be something to using RAMP methodology
    and models for software (and other)
    implementations
  • As it is too easy to cheat in software only
    models - starting from a hardware model (with
    explicit interconnect, etc.) will help
  • Can Re"host" the emulation later to FPGAs.
  • Has extra benefits of
  • avoid the bother or cost of FPGA HW initially,
    and
  • Help in verification by having two
    implementations
  • Simple Scalar has been successful party because
    it runs on anything.

4
Breakout thoughts
  • In order to pull this off need a higher level of
    abstraction for specifying units
  • 1. Library approach (users want parameterized
    high-level blocks)
  • 2. modeling language (builders of blocks want a
    common language for both HW/SW implementations)
  • Can C-gates help?
  • 3-5 years RAMP will need to transition into
    "tools
  • Right now project is still investigating the
    space of bag of tricks
  • At some point must transition to being much
    easier to use
  • (a tool not a PhD thesis)
  • Liberty as an example for RDL! (but has a steep
    learning curve!)
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