Logic Synthesis

1
Logic Synthesis

• Outline
• Logic Synthesis Problem
• Logic Specification
• Two-Level Logic Optimization
• Goal
• Understand logic synthesis problem
• Understand logic optimization problem
• From Hank Walker

2
Logic Synthesis Problem

• Map from logic equations to gate-level
  combinational logic
• will consider FSM synthesis later
• Goals
• maximize speed
• minimize power
• minimize chip/board area
• Constraints
• target technology
• CAD tool CPU time

abc abc d
bc d
3
Logic Specification
x abc def ghi jkl ... y bc e
ghi jk ...

• Two-level logic equations
• sum of products
• PLA format
• ESPRESSO format
• Multiple-level logic equations
• Berkeley Logic Intermediate Format (BLIF)
• arbitrary set of equations
• generated in converting directly from RTL
• e.g. logic equations for ALU
• generated from gate-level netlist

.i 3 .o 3 .p 4 10x101 x01100 110110 11x010 .e
x ab bc abc y abc ab z ab
literal
operand
x (a(bc)d ef(ij))(k l)
4
Logic Specification

• Logic equations are flattened to two levels
• AND-OR, NAND-NAND, NOR-NOR
• common starting point for most tools
• eliminates any input bias
• causes exponential explosion in equation size in
  worst case
• does not occur in practice

5
Logic Synthesis Problem

• 1. logic equation simplification
• reduce literal and operand count
• less stuff to implement
• generally reduces chip area
• does not always minimize delay
• 2. logic synthesis
• map equations to generic gates
• AND, OR, NOT
• 3. gate-level optimization
• local transformations for speed, area, power
• e.g. AND-NOT gt NAND
• need estimate of technology costs
• 4. technology mapping
• map from gates to component library
• FPGAs, standard cells, TTL, etc.

6
Karnaugh Maps - Two-Level Minimization
F ABCD ABCD ABCD
ABCD ABCD ABCD ABCD ABCD

• Build map - 2N entries
• label entries
• 0 - F 0
• 1 - F 1
• X - F dont care
• Find minimum prime cover
• cover - set of terms whose union is true for all
  entries that are 1
• can also cover all 0 entries instead and
  complement F
• prime - terms are simplest (largest cover) they
  can be
• AB vs. ABC ABC
• minimum - fewest terms

C
0
0
0
0
0
1
1
0
B
1
1
1
1
A
0
1
0
1
D
F AB AC BD
F AB BC AD
7
Examples
C
C
0
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
B
B
1
1
1
1
1
1
1
1
A
A
0
1
0
1
0
1
0
1
D
D
F AC BD
F AC BD ABCD
F is not a cover
ABCD is not prime
8
Examples
C
C
0
0
0
0
0
0
0
0
0
1
1
0
0
1
1
0
B
B
1
1
1
1
1
1
1
1
A
A
0
1
0
1
X
1
X
1
D
D
F AB AD BC
F A BD
Solve for complement
Use dont care terms when determining if term is
prime
9
Can Get Into Local Minima
C
C
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
B
B
1
0
0
1
1
0
0
1
A
A
0
0
0
0
0
0
0
0
D
D
C
C
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
B
B
1
0
0
1
1
0
0
1
A
A
0
0
0
0
0
0
0
0
D
D
10
Local Minima
C
C
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
B
B
1
0
0
1
1
0
0
1
A
A
0
0
0
0
0
0
0
0
D
D
C
C
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
B
B
1
0
0
1
1
0
0
1
A
A
0
0
0
0
0
0
0
0
D
D
11
Local Minima
C
C
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
B
B
1
0
0
1
1
0
0
1
A
A
0
0
0
0
0
0
0
0
D
D
F BD AD AB
F AB BD
Result is not minimal
Result is minimal
Usually many minima

• Solution
• try different cover sequences
• Minimum cover is NP-complete
• exponential time in worst case

12
Problems with Karnaugh Maps

• Exponential space in number of inputs
• e.g. 100 input function needs 2100 cells
• very inefficient if number of 1 or 0 cells is
  small
• Needs of two-level minimization
• efficient data structure
• ideally linear in size of function
• efficient means of searching for minimal prime
  cover
• get close to optimal in reasonable time
• serve as a building-block for multi-level
  minimization

13
Logic Optimization Definitions

• N-dimensional boolean space - 2N points, each
  associated with a unique set of N literals
• e.g. entries in a Karnaugh map or truth table
• each point is a minterm
• e.g. abcd, abcd, in space ltadgt
• cube - conjunction (AND) of literals in N-dim
  boolean space
• points on N-dim hypercube that are 1
• examples abc, acd
• expression - disjunction (OR) of cubes, i.e.
  equation
• example abc def
• dont cares - missing literals from cube
• example abc in space of ltadgt, d is dont care
• result is cube covering larger part of space
• abc abcd abcd

cube a DC b
ab
ab
space ltabgt
ab
ab
14
Two-Level Logic Optimization

• Approach
• find minimal set of cubes to cover ON-set (1
  minterms)
• each cube AND gate
• minimal cubes gt minimal AND gates
• each expression cubes OR gate
• one expression (OR gate) per output
• exploit dont cares to increase cube sizes
• each DC doubles cube size
• cube must only cover 1 or DC vertices
• or cover OFF-set (0 minterms) instead

ab
ab
redundancy in cube cover
a b
ab
ab
15
Two-Level Logic Optimization

• Minimal set of cubes
• minimum graph covering problem
• NP-complete - exponential in worst case
• must use heuristic search
• Complications
• solve simultaneously for each expression (output)
• minimize total number of unique cubes
• consider ON vs. OFF vs. DONT CARE set

ESPRESSO output
ESPRESSO input
.i 3 .o 3 .p 4 10x101 x01100 110110 11x010 .e
.i 3 .o 3 .p 4 -01 100 11- 010 1-0 100 10- 001 .e
x bc ac y ab z ab
x ab bc abc y abc ab z ab
16
Two-Level Logic Optimization

• Approach
• minimize cover of ON-set of function
• ON-set is set of vertices for which expression is
  TRUE
• minimum set of cubes
• exploit dont cares to increase cube sizes
• Algorithm
• start with cubes covering the ON-set
• this is just sum-of-products form
• iteratively expand, shrink, add, remove cubes
• remove redundant (covered) cubes
• result is irredundant cover

x a b
x ab ab ab
ab
ab
ab
ab
ab
ab
ab
ab
17
ESPRESSO Algorithm
Forig ON-set / vertices with
expression TRUE / R OFF-set /
vertices with expression FALSE / D DC-set
/ vertices with expression DC / F
expand(Forig, R) / expand cubes against
OFF-set / F irredundant(F, D) / remove
redundant cubes / do do F
reduce(F, D) / shrink cubes against ON-set
/ F expand(F, R) F irredundant(F, D)
until cost is stable / perturb solution / G
reduce_gasp(F, D) / add cubes that can be
reduced / G expand_gasp(G, R) / expand cubes
that cover another / F irredundant(FG, D)
until time is up ok verify(F, Forig, D) /
check that result is correct /
18
Cube Operations

• Expand
• expand essential cubes in F in decreasing size to
  a prime cube
• prime cube - fully expanded against OFF-set
• essential cube - contains essential vertex
• essential vertex - minterm no other cube covers
• remove any covered cubes

01
11
Expand
00
10
19
Cube Operations

• Irredundant
• find minimal cover with each cube containing an
  essential vertex
• find relatively essential cubes E
• removing them violates cover - keep them
• redundant cubes R F - E
• can be individually removed
• totally redundant Rt - covered by ED
• remove Rt
• partially redundant Rp - R - Rt
• new F E minimal set of Rp

E
01
11
01
11
Rp
Rt
Irredundant
00
10
00
10
Rp
20
Cube Operations

• Reduce
• shrink cubes in descending order of size while
  maintaining cover
• smaller cubes can expand in more directions
• smaller cubes more likely to be covered by other
  cubes during expansion

Reduce
21
Cube Operations

• Reduce Gasp
• for each cube add a subcube not covered by other
  cubes
• Expand Gasp
• expand subcubes and add them if they cover
  another cube
• later use Irredundant to discard redundant cubes
• this is a last gasp heuristic for exploration
• no ordering by cube size

01
11
01
11
Reduce Gasp
00
10
00
10
01
11
01
11
Expand Gasp
00
10
00
10
22
Example
x ab ab ab
Expand
ab
ab
ab
ab
ab
ab
ab
ab
Irredundant
Reduce
ab
ab
ab
ab
ab
ab
ab
ab
Expand
x a b
ab
ab
Irredundant
ab
ab
ab
ab
ab
ab
Cost Stable
23
Examples
E
Rp
Rp
E
Prime Irredundant Cover
Essential and Redundant Cubes
Initial Cover
Reduce
Expand in right direction
24
Conclusions

• Experimental Results
• ESPRESSO algorithm gets minimum or close to
  minimum cover where cover is known
• up to 10 000 input literals, 100 inputs, 100
  outputs tested
• CPU time lt 12 min on high-speed workstation
• Application
• PLA minimization
• use as subroutine in multi-level logic
  minimization
• minimize pieces of larger circuit