Aperture Array Report 2PAD 2Polarisation AllDigital

1
Aperture Array Report 2-PAD2-Polarisation
All-Digital

• Andrew Faulkner

2
Potential SKA Scenario
Collectors
100-300MHz Dipole 300-1000MHz Close packed
1-10/25GHz 6m Dishes with single wideband feed

Aperture Arrays
3
Antenna Array
60m
Tile
Support
Bunker

• Contiguous array
• Maintain from underneath
• Cover with RF transparent sheet
• Bunker in centre

4
Initial Spec for 2-PAD

• No of elements 8 x 8 in 4 quadrants 64 dual pol
  elements
• Beamformer 4 quadrants feeding beam combiner
• Input per chip 4 x 4 16 Dual polarisation
  elements
• Data rate 500MS/s per input (250MHz Bandwidth)
• Digitisation Up to 8-bits per sample
• Output 4 dual polarisation beams
• Polyphase filter 210 points with 8 taps
• Resolution 210 channels (req. 2048 input
  samples/conversion)
• Processing Shown on next slide
• Intermediate data 16-bit

Assumes that the input is conditioned by FPGA
processing
5
Mid-Freq Tiles
Bunker
n x Optical fibres per 2nd stage processor
High Freq. dishes
1st Stage Processors
.
Dish P1
.
Station Processor 1
Dish P2

..
.
.
Dish Px
20GHz Analog fibre links
Station Processor 2
To Correlator
Mid P1
Mid Freq. AA
..
Mid P2
.
Mid Py
Station Processor X
0.3-1.0GHz Analog links
Internal Digital links
Phase Standard Distribution
.
Low Freq. AA
Phase transfer over fibre (where used)
.
Low P1
Low P2
.
..
Control processors
.
To Central Control system
Low Pz
10Gb Digital fibre links
300MHz Analog links
6
2-PAD design objectives

• Demonstrate all-digital array
• Illustrate the approach to building a SKA station
• Experimental test-bed for evolving ideas and
  devices
• Develop solutions to key issues
• self induced RFI
• Cooling
• Communications interface

7
SKA Digital Processing
2012 on .

• Processor Spec (41 per tile)
• Communications
• 128 inputs at 2GS/s
• 128 outputs at 2GS/s
• Processing
• 10TMACs (1013!)
• Power
• 40 watts keep Tjunction down

• ASICS
• FPGA
• Multi-core processors

For 2-PAD, we are focussing on Multicore
Processors with FPGA Backup option

• ADC critical
• Only 4-bit max
• Cost, power and integration

Assume 4-bit digisation
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Multi-Core Processor

• Some devices considered include
• Cell-BE processor, designed for PlayStation-3
• BlueGene Processors (L P)
• Clearspeed CSX600
• All lack connectivity, speed or flexibility

Availability Q4
9
This years processor

• A multicore processor has
• A few percent of the processing power for an SKA
  chip
• 50 of required SKA chip Bandwidth
• A general-purpose Floating-point
  processorInteger arithmetic will be a
  substantial performance improvement
• Capable of demonstrating AA principles with 2-PAD

10
SKA Tile Signal Path 16x16
Bunker RFI Shield
Custom Analog Chip
Custom Digital Chip
Ant. polarisation
HSS interface
4 off Beamformer. Processors
Processor
PSU
ADC
Beamformer Processor
Beam combiner Processor
ve
Reg

4 i/ps each
.......
PCB
Station processors
Custom Analog Chip
.......
From other beamformer proc.
Analog Twisted Pair
PSU
LNA
ADC
256 elements x2 polarisations
...
4 i/ps each
...
...
Total 512 inputs
Control Processor
Line Tx/Rx
Station Control
Buffers
Time standard
11
2-PAD System Design
Bunker RFI Shield
Analog Conditioning
64 dual channels
Ant. polarisation
4 off Beamformer. Processors
Processor
Total 128 inputs
Digital Pre- processor
ADC
PSU
Beamformer Processing
Beam combiner Processor
ve
Reg

.....
.....
.......
PCB
Output Beams
Analog Conditioning
.......
From other beamformer proc.
Digital Pre- processor
ADC
Analog Twisted Pair
PSU
LNA
64 elements x2 polarisations
Control Processor
Time standard
Up to 20m
Line Tx/Rx
Buffers
Control
Signal Conditioning Rack
Processing Rack
mini-Bunker
Outdoors
12
2-PAD System Design
Bunker RFI Shield
Analog Conditioning
64 dual channels
Ant. polarisation
4 off Beamformer. Processors
Processor
Total 128 inputs

• Antenna elements plug-replaceable
• Evaluate different antenna designs
• Test dense or sparse arrays

Digital Pre- processor
ADC
PSU
Beamformer Processing
Beam combiner Processor
ve
Reg

.....
.....
.......
PCB
Output Beams
Analog Conditioning
.......
From other beamformer proc.
Digital Pre- processor
ADC
Analog Twisted Pair
PSU
LNA
64 elements x2 polarisations
Control Processor
Time standard
Up to 20m
Line Tx/Rx
Buffers
Control
Signal Conditioning Rack
Processing Rack
mini-Bunker
Outdoors
13
2-PAD System Design
Bunker RFI Shield
Analog Conditioning
64 dual channels
Ant. polarisation
4 off Beamformer. Processors
Processor
Total 128 inputs
Digital Pre- processor
ADC
PSU
Beamformer Processing
Beam combiner Processor
ve
Reg

• Front-end module
• Initially use off-the-shelf LNA devices
• Incorporate EMI shielding
• Upgrade when improved LNAs available
• Only electronics module in field

.....
.....
.......
PCB
Output Beams
Analog Conditioning
.......
From other beamformer proc.
Digital Pre- processor
ADC
Analog Twisted Pair
PSU
LNA
64 elements x2 polarisations
Control Processor
Time standard
Up to 20m
Line Tx/Rx
Buffers
Control
Signal Conditioning Rack
Processing Rack
mini-Bunker
Outdoors
14
2-PAD System Design
Bunker RFI Shield
Analog Conditioning
64 dual channels
Ant. polarisation
4 off Beamformer. Processors
Processor
Total 128 inputs
Digital Pre- processor
ADC
PSU
Beamformer Processing
Beam combiner Processor
ve
Reg

.....
.....
.......
PCB
Output Beams
Analog Conditioning
.......
From other beamformer proc.
Digital Pre- processor
ADC
Analog Twisted Pair
PSU
LNA

• Signal conditioning module
• Analogue signal conditioning on separate board
• Off-the-shelf A/D Nat. Semi
• FPGA for data conversion and initial signal
  processing

64 elements x2 polarisations
Control Processor
Time standard
Up to 20m
Line Tx/Rx
Buffers
Control
Signal Conditioning Rack
Processing Rack
mini-Bunker
Outdoors
15
2-PAD System Design
Bunker RFI Shield
Analog Conditioning
64 dual channels
Ant. polarisation
4 off Beamformer. Processors
Processor
Total 128 inputs
Digital Pre- processor
ADC
PSU
Beamformer Processing
Beam combiner Processor
ve
Reg

.....
.....
.......
PCB
Output Beams
Analog Conditioning
.......
From other beamformer proc.
Digital Pre- processor
ADC
Analog Twisted Pair
PSU
LNA
64 elements x2 polarisations

• Multi-core processor system
• Processor blades in high-bandwidth rack
• 80 Gflops/blade
• Up to 48 blades/rack
• Further developments will use same infrastructure

Control Processor
Time standard
Up to 20m
Line Tx/Rx
Buffers
Control
Signal Conditioning Rack
Processing Rack
mini-Bunker
Outdoors
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2-PAD build and test
2-PAD test site
Test Boards

• Signal conditioning/FPGA board design started
• Design/spec JBO
• Layout/manufacture Oxford

Bunker
17
Processing Build Plan

• Install a processing Rack
• Provide additional high speed I/O input to
  processor Blade
• Interface to signal conditioning

• Technologies
• Cooling system water cooled
• High speed rack-rack technology
• Upgradable to integer processing systems

Target Install date 1st Quarter 2008
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1st 2-PAD System Early 2008 then evolve it...