Cell%20Design

1
Cell Design

• Standard Cells
• General purpose logic
• Can be synthesized
• Same height, varying width
• Datapath Cells
• For regular, structured designs (arithmetic)
• Includes some wiring in the cell
• Fixed height and width

2
Standard Cell Layout Methodology 1980s
Routing channel
VDD
signals
GND
3
Standard Cell Layout Methodology 1990s
Mirrored Cell
No Routing channels
VDD
VDD
M2
M3
GND
GND
Mirrored Cell
4
Standard Cells
N Well
Cell height 12 metal tracks Metal track is
approx. 3? 3? Pitch repetitive distance
between objects Cell height is 12 pitch
Out
In
2?
Rails 10?
GND
Cell boundary
5
Standard Cells
With silicided diffusion
With minimaldiffusionrouting
Out
In
Out
In
GND
GND
6
Standard Cells
2-input NAND gate
A
B
Out
GND
7
Stick Diagrams
Contains no dimensions Represents relative
positions of transistors
Inverter
NAND2
Out
Out
In
A
B
GND
GND
8
Stick Diagrams
Logic Graph
A
C
j
B
X C (A B)
C
i
A
B
A
B
C
9
Two Versions of C (A B)
C
A
B
A
B
C
VDD
VDD
X
X
GND
GND
10
Consistent Euler Path
X
C
VDD
i
X
A
B
j
A
B
C
GND
11
OAI22 Logic Graph
X
PUN
A
C
C
D
B
D
VDD
X
X (AB)(CD)
C
D
A
B
A
B
PDN
A
GND
B
C
D
12
Example x abcd
13
Multi-Fingered Transistors
One finger
Two fingers (folded)
Less diffusion capacitance