Rewiring Review, Quantitative Analysis and Applications - PowerPoint PPT Presentation

About This Presentation
Title:

Rewiring Review, Quantitative Analysis and Applications

Description:

RAMBO considers absolute dominators td of as ... in finding redundancy is a big problem with RAMBO and REWIRE. ... are extracted from result of RAMBO. ... – PowerPoint PPT presentation

Number of Views:52
Avg rating:3.0/5.0
Slides: 36
Provided by: tangwaichu
Category:

less

Transcript and Presenter's Notes

Title: Rewiring Review, Quantitative Analysis and Applications


1
Rewiring Review, Quantitative Analysis and
Applications
  • Matthew Tang Wai Chung
  • CUHK CSE MPhil
  • 10/11/2003

2
Agenda
  • Review
  • Introduction
  • RAMBO, REWIRE
  • RAMFIRE
  • GBAW
  • Quantitative Analysis
  • Rewiring power
  • Runtime
  • Coverage
  • Applications
  • Circuit Partitioning
  • FPGA LUT mapping

3
Introduction What is Rewiring?
  • Replacing a target wire by an alternative wire
    without changing the functionality of the
    circuit.
  • An alternative wire is a redundant wire to the
    circuit.
  • Its addition would make the target wire become
    redundant hence removable.
  • Lets check out the classic example.

4
Classic Example
5
Classic Example Resultant Circuit
gates 9 ? 6 interconnect 15 ? 13
6
How can we find AWs?
  • RAMBO / REWIREATPG Mandatory assignments to
    find candidate nodes for AWs.
  • RAMFIREFIRE Redundancy identification.ATPG
    connection type.
  • GBAWGraph-based pattern matching.

7
Automatic Test Pattern Generation (ATPG)
  • We consider stuck-at-fault model.A wire is
    called stuck-at-1/0 (s-t-1/0) if the value at the
    wire is always 1/0.
  • A wire is called redundant if its addition or
    removal to the circuit does not affect the
    functions at output.
  • In ATPG, some stuck-at-faults for some wires are
    not testable ? these wires are redundant.

8
ATPG by Example
0/1
g6 ? g7 s-t-1 fault testable ? g6 ? g7 not
redundant
9
RAMBO Basic Notion
  • Consider TW (ts, td) AW (as, ad)
  • RAMBO considers absolute dominators td of as
    candidates for ad.
  • Create conflicts in M.A. by choosing suitable
    as.e.g. if dominator is a AND gate, choose with
    node M.A. 0.

10
RAMBO - Algorithm
  • foreach wire w in the network N
  • perform stuck-at-fault test on w
  • build candidate set C for w
  • Verify each wire in C by redundancy test
  • C can be very large ? a lot of redundancy test
    needed.

11
REWIRE
  • Observation that some MA is forced, which means
    conflicts these would result in untestable
    stuck-at-fault. (observability MA)
  • Some fast filters are proposed to prune the
    candidate set to avoid unnecessary time-costy
    implication.
  • The flow of REWIRE is similar to that of RAMBO.

12
REWIRE - Algorithm
  • foreach node nd in the network N
  • find OMA of nd
  • construct array of wires with nd
  • foreach wire wt of the array
  • do stuck-at-fault test on wt
  • build candidate set C
  • apply filters to C
  • Verify each wire in C

13
RAMFIRE
  • Inefficiency in finding redundancy is a big
    problem with RAMBO and REWIRE.
  • FIRE a fast redundancy identification algorithm.
  • No brute-force testing is needed, instead apply
    FIRE to get a set of alternative wires directly.

14
FIRE - Example

Uncontrollability Unobservability





15
RAMFIRE - Algorithm
  • foreach wire w in the network N
  • perform stuck-at-fault test on w (get MA)
  • perform FIRE (1 0) on w
  • Build a set of redundant wire R for w
  • Form AW in R by creating conflicts in MA
  • Only three logic implications are used for each
    wire.

16
GBAW
  • Based on pre-configured graph patterns.
  • These patterns are extracted from result of
    RAMBO.
  • There are around 20 25 patterns in the library.
  • Each pattern correspond to a known TW / AW pair.
  • Notion Pattern matching on the network to find
    AWs.

17
GBAW Pattern Example
  • Local 13 a champion pattern
  • Actual logic transformation DeMorgans law

Forward
Backward
18
Agenda
  • Review
  • Introduction
  • RAMBO, REWIRE
  • RAMFIRE
  • GBAW
  • Quantitative Analysis
  • Rewiring power
  • Runtime
  • Coverage
  • Applications
  • Circuit Partitioning
  • FPGA LUT mapping

19
Analysis Basis
  • Operation 1 Given a target wire, find a set of
    alternative wires.
  • Operation 2 Given a redundant wire to be added,
    find a set of wires becoming redundant after this
    addition.

We compare the algorithms in handling operation
1. The algorithms of RAMBO and REWIRE are
modified accordingly. All the experimental
results are obtained on the same PC running
Redhat Linux 8.0. (Duron 1.3 GHz, 256 MB)
20
Comparing Rewiring Power
21
Comparing Rewiring Power
22
Comparing Runtime (Theoretical)
  • Consider a circuit n nodes and w wires.
  • Let c and c be the sizes of the candidate set in
    RAMBO REWIRE respectively.
  • Recursive Learning (rmax 1) O(w2)

23
Comparing Runtime (Experimental)
24
Comparing GBAW RAMBO (coverage)
Forward Pattern
PI side ? higher depth ?? lower depth ? PO side
Backward Pattern
25
Comparing GBAW RAMBO (coverage)
  • RAMBO is able to locate all forward patterns by
    GBAW.Why? Forward patterns are actually
    extracted from results of RAMBO.
  • RAMBO cant find any backward patterns by
    GBAW.Why? The candidate destination node of the
    AW must be an absolute dominator in RAMBO.

26
Comments
  • GBAW RAMFIRE fast, strong in locating
    backward wires
  • RAMBO REWIRE much stronger rewiring power
  • Tradeoff CPU runtime ? Rewiring Power
  • GBAW can be an efficient pre-process filter to
    skip time-costy redundancy test.

27
Agenda
  • Review
  • Introduction
  • RAMBO, REWIRE
  • RAMFIRE
  • GBAW
  • Quantitative Analysis
  • Rewiring power
  • Runtime
  • Coverage
  • Applications
  • Circuit Partitioning
  • FPGA LUT mapping

28
Circuit Partitioning
  • Rewiring can be used in reducing the cut size.
  • Consider the wires on the cut as target wires, we
    try to find alternative wires which can be placed
    within clusters ? smaller cut size.
  • Experimental Results9 reduction in cut size
    with small penalty on the of literals. (5-way
    partition)

29
FPGA LUT Mapping
  • Given a Boolean network, map the nodes into fixed
    size lookup tables (LUT).
  • The number of inputs to a LUT is fixed, say k. A
    k-LUT can implement any Boolean function with k
    variables.
  • Objective
  • Minimize the total number of LUT used.
  • Minimize the depth of the mapping solution.

30
LUT-based mapping Example
  • k 3

31
Motivation
  • Most LUT-based mapping algorithms do not consider
    modifying the Boolean network during mapping.
  • We would like to explore the possibility to apply
    logic transformation during mapping.
  • Logic transformation our favourite rewiring
  • We have picked Flowmap to work with due to its
    solutions depth optimality.

32
Intuition Utilizing LUTs
  • We found that quite a lot LUTs are not fully
    utilized, i.e. input used lt k.e.g. pcler8 k
    5 12 / 47 nodes has 5 inputs.
  • Using rewiring, we can find backward wire to fill
    the unused input in LUTs.
  • When some LUT is utilized further, we may save
    some LUTs in the whole network.

33
Example
34
Example (Cont)
  • GBAW Local 111g6 ? g7 replaced by g6 ? g3

35
Future Work
  • Verify the intuition through more examples or
    experiments.
  • Observe and find out more intuitions.
  • Purpose a more complete scheme.

THANK YOU
Write a Comment
User Comments (0)
About PowerShow.com