PMD 101

1
PMD 101

• Frank Effenberger
• Huawei Technologies

2
Introduction

• Two issues involve the interaction of PMD speed
  and sensitivity
• FEC link rate increase
• Dual rate OLT receivers
• This presentation is meant to describe, in a
  simple way, the basic design of PMDs
• This should allow the membership to make educated
  judgments when choosing alternatives that impact
  speed/sensitivity

3
Photodetectors

• PIN diode
• Responsivity (A/W)
• Dark current (nA)
• Intrinsic capacitance (pF)
• Transit time (ps)
• APD
• All the above, plus
• Gain ()
• Excess Noise Factor ()

4
Noise, and the first amplifier

• There are several noise sources
• RIN noise (from the transmitter)
• Shot noise (from signal and dark current)
• Excess noise (from avalanche gain process)
• Thermal noise (from the circuit itself)
• In PIN receivers, thermal noise dominates
• In APDs, shot and excess noise play a role
• The SNR out of the first amplifier tells the
  story in any (properly designed) circuit

5
Trans-Impedance Amplifier

• All modern optical PMDs use this topology
• The key idea is that the amplifiers gain reduces
  the effective impedance as regards the speed of
  response
• Thus, a higher impedance value can be used
  (better SNR) while maintaining a high response
  speed (faster)

6
Circuit
Vb
R
C
Ip
B2 final LPF
Vout
A
7
Signal to Noise Ratio

• When thermal noise limited,
• SNR Ps2R/B2 (Ps/B1) (Ps/B2)
• For a fixed SNR Ps(B1B2)1/2
• When shot noise limited,
• SNR Ps/B2
• For a fixed SNR PsB2

8
The dual-rate problem

• Signals come in at different rates
• OLT must either
• Parallel process signal at both speeds (and
  decide later which was right), or
• Serially process signals at one speed
• This decision has to do with choice of detector
  technology, and whether we are thermal noise
  limited or shot noise limited

9
Parallel PMD Circuit
Vb
R
C
1Gb/s Signal 10 Gb/s signal
Ip
B21 1 GHz LPF
A
B22 8 GHz LPF
Thermal-limited Shot-limited
10
Serial PMD Circuit
Vb
Control signal
R2
R1
C
1Gb/s Signal 10 Gb/s signal
Ip
B21 1 GHz LPF
A
B22 8 GHz LPF
Thermal-limited Shot-limited
11
Comparison of Serial and Parallel

• In shot-limited case, there is no difference
• Pre-amp circuit does not impact SNR
• In thermal-limited case, the Parallel circuit 1G
  SNR is degraded by factor B1/B12 8
• Constant SNR power penalty 4.5 dB
• Practical APD receivers fall midway between these
  two extremes
• Avalanche multiplication factor optimized around
  M10

12
Optimized APD Gain
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Serial and Parallelwith optimized APDs

• For an optimized APD
• SNR Ps4/3 / (B11/3B2)
• For a fixed SNR Ps (B1B23)1/4
• The Parallel circuit 1G SNR is degraded by
  (B1/B12)1/3 2
• Constant SNR power penalty 2.25 dB

14
Overall Conclusions

• Dual rate optics present us with a choice
• Implement the serial circuit approach
• No sensitivity penalty
• Complexity of transimpedance control
• Implement the parallel circuit approach
• Simpler transimpedance amplifier
• Approximately 23 dB sensitivity penalty (APD) or
  4.5dB penalty (pin)

15
Sensitivity versus Speed (FEC)

• For a normal receiver, B1B2B
• We can see that SNRf(P/B) for a receiver with an
  optimized pre-amp
• So, a 0.28 dB increase in speed will require a
  0.28 dB increase in received power for a constant
  SNR