Xilinx University Program

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Xilinx University Program
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Agenda

• Xilinx University Program
• Teaching Tools
• Advanced Teaching Tools

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Xilinx University Program(XUP) Group Mission
To facilitate the teaching of engineering
curriculum using PLDs as the target solution of
choice. (To make your job easier)
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Who Are We?

• Patrick Kane
• XUP Manager-HQ
• Anna Acevedo
• XUP Marketing-HQ
• Jeff Weintraub
• TPME - HQ
• Chris Sepulveda
• XUP Coordinator-HQ

• Deon Spicer
• XUP-AP Liaison
• Renji Mikami
• XUP-Japan Liaison
• Lina Frangiamore
• XUP-Europe Liaison

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Why Universities Turn to Xilinx

• Can be used in various engineering labs
• Digital Design
  Networking and Communications
• Intro/Advanced Digital Design Control
  Systems
• Computer Architecture
• Projects and Labs can focus on concept, not wire
  wrapping
• Complete Software Package for Design, Synthesis,
  Implementation and download
• Immediate results in hardware
• Xilinx Design Series of Books from Prentice Hall
• Free XUP Professors Workshops available worldwide

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XUP Programs and Products

• Extensive Donation Program
• XUP Professor Workshops
• Sponsor Design Contests
• Research Collaboration
• Web Sites
• university.xilinx.com
• xup.msu.edu
• Government Sponsorship
• Prentice Hall relationship

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XUP Programs and Products
XUP Donation Policy If a new or expanded course
with lab or a research project is being added and
funding is not adequate to purchase the required
products at the University Program discounts,
Xilinx encourages any university or college to
submit a donation request.
To Purchase or To Request a Donation - What's
Practical for you? If you have sufficient budget
to purchase Xilinx software, development boards,
and/or chips, then we encourage you to do so. We
offer significant discounts for Xilinx software
and Xilinx development boards. However, we
recognize that very often, schools simply do not
have the funding even for the discounted
products. In some cases, a school might have
some funding, but not enough to obtain everything
that is needed for the lab. We encourage you to
make the choice that you feel is right for your
situation. Most importantly, if money is any
barrier to your immediate use of Xilinx products,
you should request a donation for what you need.
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Digilent Spartan-IIE Board
www.digilentinc.com
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XSV-1 Board from Xess Corp.
XCV50 - 699 XCV100 - 749 XCV300 -
899 XCV800 - 1599 To Order www.xess.com
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Xilinx Student Edition v4.2i

• Includes
• v4.2i ISE for students computers
• VHDL and Verilog synthesis with XST
• Includes CPLDs (XC9500, CoolRunner-II) and FPGAs
  (Spartan-II/E, Virtex(E), Virtex-II, Virtex-II
  Pro) up to 300K gates
• Sold through university bookstores. Also
  available at www.prenhall.com and www.Amazon.com
• Bundled with Xilinx Design Series or 55 stand
  alone
• New Web Pack Software - free download
• Includes CPLDs (XC9500, CoolRunner-II) and FPGAs
  (Spartan-II/E, Virtex(E), Virtex-II, Virtex-II
  Pro) up to 300K gates
• VHDL, Verilog

Note Xilinx student edition software is for
students personal use and not to be installed in
university labs
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Xilinx Design Series from Prentice Hall
Logic and Computer Design Fundamentals Morris
Mano and Charles Kime
Digital Design Principles and Practices (3rd Ed)
John Wakerly
Modeling, Synthesis and Rapid Prototyping Using
the Verilog HDL By Michael Ciletti
Introductory VHDL From Simulation to Synthesis,
1/e Sudhakar Yalamanchili
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Xilinx Design Series from Prentice Hall
Digital Electronics Laboratory Experiments Using
the Xilinx XC95108 CPLD with Xilinx Foundation
Design and Simulation Software, 1/e James W.
Stewart ,Chao-Ying Wang, both of DeVry Institute
of Technology
Digital Electronics with PLD Integration,
1/e Nigel P. Cook
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XUP URL university.xilinx.com
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Xilinx University Resource Center

• Hosted by Michigan State
• University
• Professor Resources
• Teaching Materials
• Support Texts
• Student Resources
• Tutorials
• Project Examples
• General Resources
• Hardware/Software
• Online Support
• Discussion Forum
• FAQs
• Email support

www.xup.msu.edu
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http//support.xilinx.com

• The Most Up-to-Date
• Information on Xilinx Products
• Forums
• Database search
• techXclusives
• Software Updates
• Problem Solvers
• Software Manuals
• Web Case for Professors

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FAQ

• Who will Xilinx support in the universities?
• Xilinx will give technical support to Professors
  and teaching assistants in the university labs.
  Students should get their support from their
  Professors or at support.xilinx.com or
  www.xup.msu.edu

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Agenda

• Xilinx University Program
• Teaching Tools
• Advanced Teaching Tools

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Software for Labs

• V4.2i ISE Software
• Design Entry
• XST Synthesis
• Implementation
• Simulation (MXE-II)
• iMPACT Programmer
• CORE Generator
• Parameterizable Cores
• StateCAD/State Bencher
• State Machine Design
• HDL Bencher
• Test Bench Generation

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Software for Students

• FREE ISE WebPACK
• Downloadable desktop solution
• HDL / ABEL synthesis simulation
• JTAG and 3rd party EDA support
• Supports all Xilinx CPLD families, Spartan II,
  next generation Spartan, and Virtex E/Virtex II
  (up to 300K gates)

• Xilinx Student Edition - v4.2i XSE
• Accepts VHDL, Verilog standard netlists
• Fitting and timing reports
• Supports all Xilinx CPLD families, Spartan II,
  next generation Spartan, and Virtex E/Virtex II
  (up to 300K gates)

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Virtex-IIPlatform FPGA for Multiple Applications

• Density 40K to 8M gates
• Memory up to 3 Mbits
• Xcite Digitally Controlled Impedance
• On-Chip clock generation
• 16 Global Clocks
• Embedded High-Speed Multipliers

Processing Platform
DSP Platform
Connectivity Platform
Empower!TM Processing
XtremeDSPTM Solution
SystemIOTM Interfaces
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Spartan-IIE
On-Chip Memory Distributed Memory Block
Memory External Memory
System Clock Management Digital Delay Lock Loops
(DLLs)
IOB
IOB
DLL
DLL
. . .
I O B
I O B
CLB
CLB
R A M
R A M
. . .
. . .
I O B
I O B
R A M
R A M
. . .
System Interfacing SelectI/OTM
Technology Support major I/O standards
Logic Routing Flexible logic implementation Vect
or Based Routing Internal 3-State bussing
CLB
CLB
DLL
IOB
IOB
DLL
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CoolRunner-II
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On-Chip Verification
ChipScope ILA System Diagram
Target FPGA with ILA cores
USER FUNCTION
USER FUNCTION
Chipscope ILA
PC running ChipScope
USER FUNCTION
Control
JTAG
JTAG Connection
MultiLINX Cable or Parallel Cable III
Target Board
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Agenda

• Xilinx University Program
• Teaching Tools
• Advanced Teaching Tools

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Computer Architecture
MicroBlaze Solution - MDK 2.1

• Soft Processor Core
• 32-bit - Harvard Bus RISC Architecture
• Size 900 Logic Cells
• Speed 125 MHz, 82 D-MIPS
• 32 General Purpose Registers 3 Operand
  Instruction Format
• IBM CoreConnnect Bus
• Standard Peripheral set
• Timer, Counter
• Arbiter
• UART, Interrupt controller, SPI
• GPIO, Watchdog timer
• External flash, SRAM interface

• GNU Development tools
• Demo Board from partners
• Sample applications

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Digital Signal Processing
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Summary

• Xilinx is an excellent choice as target
  technology for many engineering courses and
  projects.
• XUPs job is to make your job easier
• Make it easy for professors to stay current with
  technology and to get Xilinx software and
  hardware
• Offer web sites with lab exercises
• Prentice-Hall Xilinx Design Series textbooks