Title: Juergen Vogt
1HS Esslingen Thesis Presentation
21.05.07
Conception, Design Assembly of a High Speed,
High Dynamic Range Imaging System for
Fluorescence Microscopy
2Outline
Research Background
Camera Design
- Research Background
- The Application
- Application Requirements
- The Whole System
- Camera Design
- The Acquisition System
- CCD Technologies
- The Camera
- Software Overview
- Summary
3Application Neuro Imaging
Research Background
Camera Design
- What is neuro imaging ?
- Injecting a fluorescent substance into an object
of interest (e.g. brain) - Stimulating the object (e.g. breathing)
- Watching the change in florescence upon
stimulation - What is the goal of neuro imaging ?
- Understanding which areas of the brain are more
or less neuronal active or responsible for actions
4The Resulting Sequence
Research Background
Camera Design
Image Sequence mapped to respiratory cycle
5Application Requirements
Research Background
Camera Design
- Low noise
- fluorescent dyes provide only 0.05-10 changes in
intensity - High-spatial resolution Individual neurons are
5-40 mm - Either high speed acquisition or long exposure
- Programmable camera depending on experiments
- Fast recording capabilities
- Individual events may only have 2ms duration
- Long term recording
- Additional electrophysiology data feeds
- Merge data in real time with the images
- Triggered imaging
- Additional trigger inputs to capture images
- Lab environment
- Easy to use Plug Play camera
6The Whole System
Research Background
Camera Design
Custom HW Custom SW
Off shelf HW Custom SW
Off shelf HW Off shelf SW
Camera
Control, Setup programming
Non real time storage evaluation
Real time acquisition recording
7How do we start ?
Research Background
Camera Design
- Choice of CCD
- Low noise
- HDR
- Reasonable priced
- Choice of interconnect
- Large throughput
- Sustained throughput
- Reliable throughput
- Choice acquisition system
- Enough short term storage
- Enough processing power
- Compatible with interconnect
8The Usual CCD
Research Background
Camera Design
Light
Unenclosed light sensitive area for acquisition
Enclosed light sensitive area for storage
Serial read out register
9Electron Multiplier CCD
Research Background
Camera Design
Light
Unenclosed light sensitive area for acquisition
Enclosed light sensitive area for storage
Electron multiplier
Serial read out register
10EMCCD Requirements
Research Background
Camera Design
- EMCCD requires 13 control signals
- Low noise high speed clock signals with huge
voltage swing required - Accurate phase shifted or random pattern
- All frame rate dependent
11The Interconnect
Research Background
Camera Design
- CameraLink benefits
- Compatibility with existing imaging systems
- Proven functionality
- Open standard
- 24 bit _at_ 85 MHz 2 GBit/s
- 250 MB/s
- Standard causes cheaper and more reliable
development hardware, software and parts - (e.g. 3 ft. of cable for just 90,-)
12The Acquisition System
Research Background
Camera Design
- Dual Xeon 3.2 GHz HT
- up to 16 GB RAM
- 150 MB/s RAID 0
- Gidel prototyping board
- PCI-X 100 compatible
- Altera Cyclone II 35 FPGA
- DRAM 64MB
- Expandable to up to 16GB
- PCI-X sustained throughput 400MB/s
- I/O connections 314
- CameraLink interface daughter board
- Providing 2 CameraLink 26 pin MDR ports
13Camera Requirements
Research Background
Camera Design
Class Project
- EMCCD
- Voltage regulators
- Low noise
- A/D Converter
- Digitization of the image with a high speed
- FPGA
- CCD exposure and readout control
- Post processing of the image, Compression,
filtering requires a powerful FPGA - Additional inputs
- Trigger inputs for capture on demand
- Electrophysiology data
- CameraLink
14Chosen Components
Research Background
Camera Design
Class Project
- EMCCD TI TC253SPD-BD 656x496, 14 bit HDR with
build in peltier cooler - Linear Technology LTC2284 ADC
- 14 bit 105 Msps dual ADC
- Xilinx Virtex II Pro (speed grade -6)
- Power PC 405 RISC processor
- 11088 logical cells (FF 4 bit LUT Carry
Logic) - National Semiconductors DS90287 LVDS Serializer
- Dimensions 30x10 cm (12x4 inches)
- 6 layer PCB to provide enough space for routing
15Decisions Restrictions
Research Background
Camera Design
- Peltier controller will be mounted on a socket on
top of the board to save space - Early digitization close to the imaging sensor
- CCD needs to be placed
- at the end of the board
- not to block the viewer
- Mounting holes need
- to be specified early in order
- to manufacture a case
- Split up in analog and digital
- side to reduce noise
- Analog signal path shielding
Camera
16The PCB Board
Research Background
Camera Design
Analog power reg.
Digital Power reg.
CLK
Switches
SerDes
CCD
ADC
MDR26
FPGA
Proms
Analog signal path
CLK
Analog power reg.
Analog side
Digital side
17Timeline
Research Background
Camera Design
- Feasibility studies for CameraLink transmission
- Draw check schematics / limited simulations
- Generating pads, footprints symbols
- Part layout and physical considerations
- Power wiring
- Signal wiring
- Fabrication
- Assembly
- Test
- FPGA programming
- PCI-X card programming
- Software adaptation
- Feature implementation
18Software Overview
Research Background
Camera Design
Async. Control
Camera VHDL
PCI-X Card VHDL
DMA
RAM
Async. Control
Interrupt
Imaging Software C
Display
HDD
19Camera State Machine
Research Background
Camera Design
Exposing
Storing
Reading
Sending to PC
Async. Receive
Different colors represent different clock
domains or asynchronous signals
20Camera State Machine
Research Background
Camera Design
Exposing
Storing
Reading
Pixel Processing
Sending to PC
Image Processing
Async. Receive
Different colors represent different clock
domains or asynchronous signals
21Summary
Research Background
Camera Design
- Flexible research platform for
- Neuro imaging
- Signal processing
- Image processing
- Electrical engineering
- Open platform with available hardware design
source code - FPGA inside the camera
- High flexibility to adopt camera for different
needs in different experiments or complete
different applications - Cheaper camera for research