The Cypress PSoC-1

1
The Cypress PSoC-1
Lots of I/O Pins(Each port up to 8 bits)
8-Bit CPU CoreWith RAM and ROM
Blocks for processingDigital signals
Blocks for processingAnalog signals
All Toys such as ADCs, Timers, RS232, etc.
are madeout of configurable digital andanalog
blocks
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What can you do with Digital/Analog Blocks?

• Analog-to-Digital Converters
• 8- to 14-bit resolution, multiple configurations
• Digital-to-Analog Converters
• 6- to 9-bit resolution
• Timers, Counters, PWMs
• 8- to 32-bit resolution
• Serial Interfaces
• RS232, I2C, SPI
• Programmable Gain Amplifiers, Filters
• Random sequences
• Etc.

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PSoC 29x66 Mechanical Characteristics
28 Pin 3 I/O Ports
44 Pin 5 I/O Ports
48 Pin 6 I/O Ports
29x66-Series PSoCs come infive sizes.The
primary difference is the number of I/O pins.

• PDIP Plastic Dual Inline Package
• SSOP Shrink Small Outline Package
• SOIC Small Outline Integrated Circuit
• TQFP Thin Quad Flat Pack
• QFN Quad Flat No Leads

100 Pin 8 I/O Ports
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Key PSoC Electrical Characteristics

• Supply voltage either 3.3V or 5.0V
• Built in controller (SMP) provides 3.3V from a
  single 1.5V battery or 5.0V from two 1.5V
  batteries
• Clock speed 930 KHz 24 MHz
• Can use internal oscillator or external crystal
• Power usage (running) 15 70 mW
• AA battery supplies about 2 Watt-Hours
• Around 80 hours of life on one AA
• Power usage (sleep) 10 70 uW
• Around 80,000 hours or 10 years of life on one AA

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The PSoC CPU Core M8C
System Bus 8 Bits WidePasses data between the
CPU, memory, ports and peripherals
Flash Memory 32K Bytes in 29x66Holds program
code (nonvolatile!)Can be used to hold user data.
Supervisory ROMHolds boot-up code andcode to
read from flash memory.
SRAM 2048 Bytes in 29x66Regular memory for use
of CPUand peripherals. 256 bytes
easilyaccessible remainder requires paging.
Interrupt ControllerAllows external events to be
communicated to the CPU
M8C CPU CoreExecutes instructions
(arithmetic,logic, data movement,
control)Modifies registers and memory
Clock Sources 930KHz 24MHzProvides basic
timing for the CPUand peripheral devices.
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M8C Core Registers
8-Bit Accumulator RegisterUsed to hold results
of instructions
7 A 0
8-Bit Index RegisterUsed as a pointer to
internal SRAM.Note 8 bits limits basic RAM size
to 256 bytes
7 X 0
8-Bit Stack PointerUsed as a pointer to the
topof the system stack in SRAM
7 SP 0
15 PC
0
16-Bit Program CounterPoints to current
instruction in Flash EEROM
8-Bit Flag RegisterBits
7,6 Page Mode for SRAM (00,01,10 or 11)Bit 5
Unused Bit 4 XIO select for Port Register Bank
(0 or 1) Bit 3 UnusedBit 2 Carry 1 if
operation produced a carryoutBit 1 Zero 1 if
operation resulted in zeroBit 0 Global
Interrupt Enable
7 F 0