FE Review

1
FE Review 2

• Boolean Algebra
• Digital Design Principles

2
Switching Algebra

• Variables, expressions, equations
• Axioms (A1-A5 pairs)
• Theorems
• Single variable
• 2- or 3- variable
• N-variables
• Prime, complement, logic multiplication/addition,
  precedence

3
How to prove a theorem?

• Perfect induction (1,2,3-variable)
• Finite Induction (n-variable)
• Method used in Exercise 4.29

4
Duality

• Swap 0 1, AND OR
• Result Theorems still true
• Principle of Duality (Metatheorem)
• Any theorem or identity in switching algebra
  remains true if 0 and 1 are swapped and and
  are swapped throughout.
• Fully parenthesized before taking its duality

5
DeMorgan Symbol Equivalence
6
Likewise for OR
7
Representations for a combinational logic
function

• Truth table
• Algebraic sum of minterms (canonical sum)
• Minterm list
• Algebraic product of maxterms (canonical product)
• Maxterm list

8
Combinational-circuit anaylsis

• Obtain a formal representation of a given circuit
• Truth table axioms, exhaustive
• Logic expression algebraic approach
• Simluation/testbench HDL

9
Combinational circuit synthesis

• Description---gtcombinational logic circuit.
• Description
• Word description of a problem using
  English-language connectives
• Write corresponding logic expression/truth table
• Manipulate the expression if necessary.
• Build a circuit from the expression.

10
Minimization

• Logic Function minimization Simplifying the
  logic function to reduce the number and size of
  gates.
• Minimization methods1- Algebraic
  simplification Using theorems T9,T9, T10,T10
  
• 2- Karnaugh map (SOP, POS, multiple-outputs,
  Dont Cares)3- CAD tools, HDLs

11
Simplifying SOP

• Draw K-map
• Find prime implicants (circle largest rectangular
  sets of 1s 16,8,4,2,1)
• Find distinguished 1-cell
• Determine essential prime implicants if available
• Select all essential prime implicants and the
  minimal set of the remaining prime implicants
  that cover the remaining 1s.

12
Simplifying POS

• Products-Of-Sums(POS) minimization
• Duality circle 0s on the K-map
• F(F)
• Draw a K-map for F
• Simplifying SOP for F
• Get POS for F using DeMorgan theorems
  repeatedlyF(F)

13
Other minimization issues

• Dont care conditions
• d
• Since the output function for those
  minterms(maxterms) is not specified, those
  minterms(maxterms) could be combined with the
  adjacent 1 cells(0-cells) to get a more
  simplified sum-of-products (product-of-sums)
  expression.
• d cells are only combined when we have to.
• Multiple-outputs
• Term sharing can reduce costs

14
Timing hazards

• A properly designed two-level SOP (AND-OR)
  circuit has no static-0 hazards. It may have
  static-1 hazards.
• A properly designed two-level POS (OR-AND)
  circuit has no static-1 hazards. It may have
  static-0 hazards.
• Dynamic hazards do not occur in a properly
  designed two-level AND-OR or OR-AND circuit.It
  may occur in multilevel circuits. (Figure 4-49,
  pp248)
• A brute-force method of obtaining a hazard-free
  realization is to use the complete sum or
  complete product.
• Hazard analysis and elimination are typically
  needed in the design of asynchronous sequential
  circuits.

15
Summary

• Boolean Algebra is used to represent , manipulate
  and simplify logic functions.
• Truth table represents the logic function by
  listing the output for each possible combination
  of the inputs.
• Combinational circuit analysis- The logic
  function is obtained from the logic circuit.-
  The truth table is obtained from the logic
  circuit by evaluating the logic function for
  each combination of the input variables.- The
  Canonical sum ( sum-of-products ) is the sum of
  all minterms in the truth table.- The
  Canonical product ( product-of-sums ) is the
  product of all maxterms terms in the truth
  table.- Boolean algebra theorems are used to
  simplify the canonical forms and obtain a
  simplified representation of the logic function

16
Summary (Contd)

• Combinational circuit synthesis- The logic
  circuit is obtained from the logic function.-
  There are four equivalent canonical
  implementations of a logic function -
  AND-OR NAND-NAND - OR-AND NOR-NOR-
  Karnuagh map is used to simplify the canonical
  forms 1- The canonical sum expression is
  simplified by combining the 1s to obtain
  the minimal sum. 2- The canonical product is
  simplified by combining the 0s to obtain
  the minimal product.
• The minimal sum and the minimal product
  implementations could produce hazards