DATA CONVERSION AND SIGNAL PROCESSING WITHOUT SAMPLING

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DATA CONVERSION AND SIGNAL PROCESSING WITHOUT
SAMPLING
ISSCC 2008

• Yannis Tsividis

Dept. of Electrical Engineering Columbia
University, New York

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Contents

• Introduction
• Some issues with sampling
• Continuous-time ADC
• Continuous-time DSP
• Conclusions

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Introduction
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Introduction

• The time axis can be quantized finer and finer
• with nm processes.
• More and more operations can be done in time
  mode.
• Infinitely fine time quantization would be ideal
• but is infinitely difficult.
• But its equivalent, i.e. no time quantization at
  all,
• is relatively easy!
• This talk deals with A/D conversion and DSP
• without sampling all in continuous time.

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Signal possibilities
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Some Issues with Sampling
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Consider sampling ADC-DAC equivalent
To make it easier to interpret the output, note
that it does not change if the order is reversed
(principle only)
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Thus, when we sample and quantize, we have

• Large in-band error

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Simulated in-band quantization error (12 bits)
(Tsividis 2004)
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Example waveforms - 4 bits
Sampling ADC
Non-sampling ADC
Input
1 kHz
fs32,051 Hz
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Continuous-Time ADC
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Continuous-time PCM

• NO CLOCK
• Transitions can occur at any time

As in Time Code Modulation (Mark and Todd,
1981 Foster and Wang, 1991) but without
quantizing time.
Key to coding!
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Continuous-time flash ADC (Principle only)

• Several practical issues
• (glitches, signal-dependent
• comparison time)
• Async logic techniques can
• help (Akopyan 2006).

NO CLOCK
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Continuous-time Delta modulation

• NO CLOCK
• Transitions can occur at any time

t
(Inose 1966)
Key to coding!
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Delta mod ADC
DELTA MOD OUT
NO CLOCK

• OUT indicates if VHIGH or VLOW have been crossed
• Taps are then moved up or down
• to keep VLOWltINPUTltVHIGH

(Allier 2003 Li 2006)
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Continuous-Time DSP
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Continuous-time DSP
NO CLOCK
(Tsividis 2004)
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Continuous-time digital delays Principle

• For better approach, see Schell 2008.
• Use automatic tuning to accurately set the total
  delay.

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Typical output waveform

• Output time transitions can differ by arbitrarily
  small amount.
• Requires high speed non-clocked combinational
  logic, ADC, and DAC.
• Graceful degradation at high signal frequencies.
• Clean output can be sampled at a constant rate
  if desired.

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Comparison Freq. response and spectrum
For explanations see Tsividis, 2004
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Comparison contd - Transient Response
OUT
OUT
IN
IN
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Pre- or post-filtering

• Pre- or post-filtering needed to eliminate
  periodicity of frequency response
• Pre-filtering Also serves to limit input rate of
  change
• Post-filtering Also removes out-of-band
  quantization error.

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Power dissipation

• Each level crossing triggers a cascade of
  processing operations

• Average power level crossings per unit time

• Power scales automatically with signal slope

• Number of level crossings can be in very large
  for maximum amplitude, maximum frequency input
  (rare).

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Power dissipation, contd

• Average power can be much lower than maximum
  power for
• Speech
• Peak-to-average ratio of 14 dB
• Long periods of silence
• Environmental sensor outputs
• Burst-type
• DC control loops
• Active occasionally, when correction is required
• Application in DC-DC converters (Zhao 2007)

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Design considerations

• Preserve time intervals
• Minimize comparison time dependence on input
  level and slope
• Prevent glitches by using handshaking throughout
• Minimize jitter
• Keep delays closely matched use automatic
  tuning.

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Delta mod version

• Eliminates bit-to-bit delay mismatch problem.

(Li 2006)
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Test chips
Rapid progress is being made.
Li et al., JSSC 2006 - 2.5 V, 0.25 um
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What other signals can be processed using
continuous-time DSP?

• Any bi-level signal can be processed using
  continuous-time DSP
• Delta (various forms)
• PWM
• PPM
• PDM
• Sigma-Delta
• Non-clocked or clocked
• No synchronization, no oversampling needed in
  order to process

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Conclusions
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• The time has come to use time (all of it!)
• Continuous-time DSP features
• Fully digital (noise immunity, programmability)
• No sampling thus no signal aliasing, no discrete
  tones
• Smaller in-band quantization error than classical
• Drastic power reduction with decreasing input
  activity
• Processor reacts immediately to changing inputs

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Conclusions, contd

• Applications considered so far
• Speech
• Sensors
• DC loops
• Techniques described can process any binary
  signal, whether non-clocked or clocked
• DM, PWM, PPM, PDM, S?
• No need for synchronization
• For more info Latest test chip presented by Bob
  Schell at this conference Wednesday 415, paper
  30.6

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References

• Akopyan 2006 F. Akopyan, R. Manohar, and A.
  Apsel, "A Level-Crossing Flash Asynchronous
  Analog-to-Digital Converter," Proc.12th
  International Symposium on Asynchronous Circuits
  and Systems, pp. 12-22, Grenoble, March 2006.
• Allier 2003 E. Allier, G. Sicard, L. Fesquet,
  and M. Renaudin, A new class of asynchronous A/D
  converters based on time quantization, Proc. 9th
  International Symposium on Asynchronous Circuits
  and Systems, pp. 196-205, Vancouver, May 2003.
• Foster 1991 J. Foster and T.-K. Wang, Speech
  coding using time code modulation, Proc. IEEE
  Southeastcon, vol. 2, pp. 861-863, April 1991.
• Inose 1966 H. Inose, T. Aoki, and K. Watanabe,
  Asynchronous delta modulation system,
  Electronics Letters, vol. 2, pp. 95-96, 1966.
• Kumar 1998 N. Kumar, W. Himmelbauer, G.
  Cauwenberghs and A. G. Andreou, An analog VLSI
  chip with asynchronous interface for auditory
  feature extraction, IEEE Trans. CAS II, vol. 45,
  pp. 600-606, May 1998.
• Li 2006 Y. W. Li, K. L. Shepard, and Y. P.
  Tsividis, A continuous-time programmable digital
  FIR filter, IEEE Journal of Solid-State
  Circuits, vol. 41, no. 11, pp. 2512-2520,
  November 2006.
• Mark 1981 J. W. Mark and T. D. Todd, A
  nonuniform sampling approach to data
  compression, IEEE Trans. Commun., vol. COM-29,
  pp. 24-32, Jan. 1981.
• Schell 2008 B. Schell and Y. Tsividis, A
  clockless ADC/DSP/DAC sysem with
  activity-dependent power dissipation and no
  aliasing, Digest ISSCC 2008, paper 30.6.
• Tsividis 2004 Y. Tsividis, Digital signal
  processing in continuous time a possibility for
  avoiding aliasing and reducing quantization
  error, Proc. 2004 IEEE ICAASP, vol. II, pp.
  589-592, Montreal, May 2004 .
• Zhao 2007 Z. Zhao, V. Smolyakov, and A. Prodic,
  Continuous-time digital signal processing based
  controller for high-frequency DC-DC converters,
  Proc. 2007 IEEE Applied Power Electronics
  Conference, pp. 882-886, Anaheim, Feb. 2007.

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