Avalon interface AvalonMubus

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Avalon interfaceAvalon-Mubus

• Goal
• Understanding of a synchronous bus Avalon
• Understanding of an asynchronous bus Mubus
• by a simple Avalon to Mubus bridge
• functional timing analysis

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Avalon switch fabric
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Avalon slave signals
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Avalon Bus

• Slave view of transfers

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Avalon slaveread, 0 wait, asynchronous peripheral
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Avalon slave read, 1 wait
Wait cycle specified by design
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Avalon readslave, 2 wait
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Avalon readslave, wait request generated by
slave device
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Avalon readslave, 1 set up and 1 wait
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Avalon writeslave, 0 wait
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Avalon write slave, 1 wait
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Avalon writeslave, wait request generated by
slave
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Avalon writeslave, 1 set up, 1 hold, 0 wait
1 su
1 hold
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Bus avalon

• Master view

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Avalonmaster signals (1)
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Avalonmaster signals (2)
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Avalon readmaster, 0 wait
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Master Avalon readwait generated by slave or
Avalon bus
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Master Avalon write0 wait
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Master Avalon writewait generated by slave or
Avalon bus
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Avalon interfaceAvalon-Mubus

• Design of the Avalon-Mubus interface
• Global view
• Timing to generate
• Read/Write transfers equations

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Avalon-Mubus General system view
A5..0
Avalon_Mubus Interface
P_n
Avalon Master
R_Wn
Clk
Clk
D7..0
Av_ReadData7..0
Av_WriteData7..0
ReadData31..0
ByteEnable3..0
WriteData31..0
Address31..0
WaitRequest
Av_Add5..0
Av_Read
Av_Write
Av_Write
Av_CS
Write
Read
Avalon Bus Switch
dec
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Mubus external Interface
Read Cycle
Write Cycle
Data read
Data Write
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Avalon timing
Write Cycle
Read cycle
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Timing

• Mubus Address stable
• Before P_n activated (at '0')
• After P_n desactivated
• ? delayed from Avalon address by 1 clk
• Mub_A5..0 lt Av_Ad5..0 when rising_edge(clk)

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Timing

• Mubus R_Wn stable for write cycle
• Before P_n activated (at '0')
• After P_n desactivated
• ? delayed from Avalon Write signal by 1 clk
• WrRet lt Av_Write when rising_edge(clk)
• With
• Av_Write 1 set_up, 1 hold time, 1..xx wait
• Mub_R_Wn lt Av_Write OR WrRet

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Timing

• Mubus P_n stable
• Addresses stable
• R_Wn stable
• Write cycle DataWrite stable
• P_n lt Not (Av_CS AND ((Av_Wr AND WrRet) OR
• (Av_Rd AND RdRet)))