Dr Richard Reilly

1
Lecture 3

• Dr Richard Reilly
• Dept. of Electronic Electrical Engineering
• Room 153,
• Engineering Building

2
Levels of Representation
temp vk vk vk1 vk1 temp

• lw 15, 0(2)
• lw 16, 4(2)
• sw 16, 0(2)
• sw 15, 4(2)

0000 1001 1100 0110 1010 1111 0101 1000 1010 1111
0101 1000 0000 1001 1100 0110 1100 0110 1010
1111 0101 1000 0000 1001 0101 1000 0000 1001
1100 0110 1010 1111
ALUOP03 lt InstReg911 MASK
3
Levels of Organization
PC Workstation

• PC Workstation Designs
• 25 of cost on Processor
• 25 of cost on Memory
• (minimum memory size)
• Rest on I/O devices,power supplies, box

4
Execution Cycle
Obtain instruction from program storage
Determine required actions and instruction size
Locate and obtain operand data
Compute result value or status
Deposit results in storage for later use
Get the following instruction
5
What we already know

• Last year you will have seen logic circuits for
  manipulating and storing individual data bits.
• However at the architectural level we deal with
  memories and processing units that store and
  process long sequences of blocks of
  word-organised data.

6
Connections

• We are also concerned with the connections
  between the system and the outside world.
• Connections require
• the presence of input/output circuits to handle
  communication
• associated data processing, such as converting
  data between analog and digital forms,
• changing the word size
• etc.

7
Computers based around 5 components
8
CPU

• The CPU is the Central Processing Unit and
  carries out the following functions
• Processes all of the data
• Reads input from the keyboard (and/or mouse)
• Writes to the video display (and/or printers)
• Uses memory for intermediate storage (fast
  access) for programs and data
• Uses the hard disk for permanent storage, i.e.
  after power down.

9
CPU

• The most important element of a computer is the
  CPU, essentially the centre of decision making.
• There are many different CPU designs
• CPU of MAC computer different from PC
• CPU of alarm systems different from TV remote
  control.
• However the basic concept in all CPUs is the
  same.

10
CPUs all have the following.

• An ALU,
• A program counter (PC)
• An instruction decode logic.
• This contains the control logic needed to
  interpret the CPUs instructions and decide the
  order in which the instructions of a program are
  to be executed.
• A typical CPU is designed to handle 20 to 200
  different types of instructions, but only
  executes one instruction at a time.
• A special type of CPU that is implemented on a
  single chip is referred to as a microprocessor.

11
(No Transcript)
12
Von Neumann

• Most computers use a Von Neumann architecture.
• assumes that each store location in main store
  can hold either an instruction or a piece of
  data.
• Thus the computer program is a sequence of
  instructions stored in memory i.e. stored program
  concept.
• This gives a single memory space for program code
  (instructions) and data (variables, etc.).
• This memory is accessed using a single external
  address and data bus.

13
Components of a CPU

• Need to know the functions of all the main
  elements of a CPU
• Allows comparison between different designs
• Allows for improved design

14
(No Transcript)
15
(No Transcript)
16
Reset and Program Counter

• Reset
• Reset signal is used to put the CPU into a known
  state.
• Resets the Program Counter to 0000.
• Clears registers and status bits, etc.
• Program Counter
• The program counter contains the address of the
  next instruction word or the next part of an
  instruction word.
• Incremented after each instruction cycle.

17
(No Transcript)
18
(No Transcript)
19
Instruction Decode and Registers

• Instruction Decode Register and Logic
• Store for the current instruction.
• Interprets the instruction and generates all of
  the appropriate control signals required to
  execute the instruction.
• Register File
• Internal registers used for temporary data
  stores.
• A register is a high speed memory location used
  for the temporary storage of data or control
  information.

20
(No Transcript)
21
(No Transcript)
22
ALU and ACC

• ALU
• implements all of the arithmetic and logical
  operations
• ABS, XOR R0.
• Accumulator (ACC)
• stores the results of all of the ALU operations.
  
• Normally it is one of the operands of the ALU,
• ADD R0 ? ACC ACC R0.

23
(No Transcript)
24
(No Transcript)
25
Status Register and Bus Switch

• Status Register
• This register contains the status bits.
• The status bits are updated after each ALU
  operation.
• The usual status bits are
• the Zero (Z) bit,
• the Negative (N) bit
• the Carry (C) bit.
• Bus Switch
• This switch allows the source of the address to
  come from the register file via the data bus.
• This allows the use of pointers.

26
(No Transcript)
27
(No Transcript)
28
MAR, DMR and RD WR

• Memory Address Register
• The Memory Address Register is a temporary store
  for addresses that originate from the instruction
  word.
• used to provide the address for the memory.
• Data Memory Register
• The Data Memory Register is a temporary store for
  data to and from memory.
•  
• Address and Data Bus, RD WR
• The address and data bus is used to connect to
  external memory.
• The RD line is used for memory reads
• WR line is used for memory writes.

29
(No Transcript)
30
Stack

• Basically a set of consecutive locations in
  memory into which operands can be placed.
• A stack is a Last In First Out (LIFO) memory,
• the value read out from a stack is the last value
  written in.
• The basic operations are PUSH (write) and POP
  (read).

31
Stack

• Can be implemented in hardware using a small
  block of memory and a pointer
• e.g. 8 x 16 memory and 3-bit pointer.
• A write operation pre-increments the pointer
• read operation post-decrements it.

32
Stack

• Usually the following stack status flags are
  generated.
• SE Stack Empty Generated when SP 0
• SF Stack Full Generated when SP7
• SOV Stack Overflow Generated if SF1 PUSH
• SUV Stack Underflow Generated if SE1 POP
• A stack can be implemented in memory by
  allocating a block of memory for the stack space
  and maintaining a stack pointer.
• Before a write operation the pointer must be
  incremented and after a read operation it must be
  decremented.

33
Summary

• Instruction set architecture
• a very important abstraction!