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FPGA Technology Overview

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Compile the design for the selected device. Download the compiled configuration ... FPGA Design. Main components are generally done as custom designs ... – PowerPoint PPT presentation

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Title: FPGA Technology Overview


1
FPGA Technology Overview
  • Carl Lebsack

Some slides are from the Programmable Logic
lecture slides by Dr. Morris Chang
2
Whats an FPGA?
  • FPGA Field Programmable Gate Array

3
(No Transcript)
4
How do you make a Programmable circuit?
  • One time programmable
  • Fuses (destroy internal links with current)
  • Anti-fuses (grow internal links)
  • PROM
  • Reprogrammable
  • EPROM
  • EEPROM
  • Flash
  • SRAM - volatile


non-volatile
5
How do you program an FPGA?
  • Create a circuit design
  • Graphic circuit tool
  • Verilog
  • VHDL
  • AHDL
  • Compile the design for the selected device
  • Download the compiled configuration

6
FPGAs offer many advantages over ASICs
  • Small development overhead
  • No NRE (non-recurring engineering) costs
  • Quick time to market
  • No minimum quantity order
  • Reprogrammable

7
What are the Guts of an FPGA?
  • Basic Components
  • LUT (look-up-table)
  • Flip-Flops
  • Multiplexors
  • I/O Blocks
  • Programmable switching matrices
  • Interconnect
  • Clocks

8
(No Transcript)
9
CMOS SRAM Cell
10
3-LUT
11
2 Slice CLB
12
LE
13
LAB
14
(No Transcript)
15
IOB
16
More Guts
  • Additional components
  • RAM blocks
  • Dedicated multipliers
  • Tri-state buffers
  • Transceivers
  • Processor cores
  • DSP blocks

17
Dedicated Arithmetic Structures in FPGAs
QuickLogic
Altera
Xilinx
18
Power PC in Virtex-II Pro
  • Embedded 300 MHz Harvard Architecture Core
  • Low Power Consumption 0.9 mW/MHz
  • Five-Stage Data Path Pipeline
  • Hardware Multiply/Divide Unit
  • Thirty-Two 32-bit General Purpose Registers
  • 16 KB Two-Way Set-Associative Instruction Cache
  • 16 KB Two-Way Set-Associative Data Cache
  • Memory Management Unit (MMU)
  • - 64-entry unified Translation Look-aside Buffers
    (TLB)
  • - Variable page sizes (1 KB to 16 MB)
  • Dedicated On-Chip Memory (OCM) Interface
  • Supports IBM CoreConnect Bus Architecture
  • Debug and Trace Support
  • Timer Facilities

19
Excalibur Embedded Solution
  • Integrates Embedded Processors With Programmable
    Logic Device
  • Delivers System-on-a-Programmable-Chip (SOPC)
  • Programmable Flexibility
  • PLD Hardware
  • Embedded Software
  • Compute Performance
  • High Performance Processor
  • Data Path Hardware
  • Customer Configuration
  • Microprocessor Peripherals
  • Hardware Logic
  • Faster Time-to-Market

Excalibur Processor
Memory
High Performance I/O
Logic
Complete SOPC Solution
20
ARM in Excalibur
  • Industry-standard ARM922T 32-bit RISC processor
    core operating up to 200MHz
  • ARMv4T instruction set with Thumb extensions
  • Memory management unit (MMU) included for
    real-time operating systems (RTOS) support
  • Harvard cache architecture with 64-way set
    associative separate 8-Kbyte instruction and
    8-Kbyte data caches
  • Embedded programmable on-chip peripherals
  • ETM9 embedded trace module to assistant software
    debugging
  • Flexible interrupt controller
  • Universal asynchronous receiver/transmitter
    (UART)
  • General-purpose timer
  • Watchdog timer

21
Altera DSP-Block-Configuration Options and
Features
22
FPGAs come in a wide variety
Numbers of subcomponents varies Special features
vary Manufacturers use own terminology
  • Xilinx
  • Slices/CLBs
  • PowerPC cores
  • Altera
  • LEs/LABs
  • ARM cores/Softcores

23
Stratix Device Overview
24
FPGA Design
  • Main components are generally done as custom
    designs
  • Layout is very regular and automation could
    assist in cell placement

25
Stratix FPGA Layout
26
PLD device density and VLSI technology
note Xilinx Virtex-II Pro XC2VP100 (9/16/2003)
27
More Information
  • www.xilinx.com
  • www.altera.com
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