HighSpeed CircuitTuning Techniques Based on Lagrangian Relaxation

1

• High-Speed Circuit-Tuning Techniques Based on
  Lagrangian Relaxation

Charlie Chung-Ping Chen
chen_at_engr.wisc.edu

(608)2651145
2
People Involved

• Joint work
• Charlie Chen, University of Wisconsin at
  Madison
• Chris Chu, Iowa State University
• D. F. Wong, University of Texas at Austin
• Publication
• Fast and Exact Simultaneous Gate and Wire Sizing
  by Lagrangian Relaxation, IEEE Transactions on
  Computer-Aided Design, July 1999

3
Acknowledgement

• Strategic CAD Labs, Intel Corp.
• Steve Burns, Prashant Sawkar, N. Sherwani,
  and Noel Menezes
• IBM T. J. Watson Center
• Chandu Visweswariah
• C. Kime, L. He (UWisc-Madison)

4
Outline

• Motivation
• Overview of Circuit Tuning Techniques
• Lagrangian Relaxation Based Circuit Tuning

5
Motivation

• Double the work load and design complexity every
  18 months

6
Motivation

• Trends
• Increased custom design
• Aggressive tuning for performance improvement
• Shorter time to market
• Interconnect effects severe
• Signal integrity issues emerging
• Circuit Tuning
• Can significantly improve circuit performance and
  signal integrity without major modification

7
Manual Sizing

• Pros
• Takes advantage of human experience
• Reliable
• Simultaneously combines with other optimization
  techniques directly
• Cons
• Slow, tedious, limited, and error-prone procedure
• Rely too much on experience, requires solid
  training
• Optimality not guaranteed (dont know when to
  stop)

1000 iterations
Change
Simulate
Satisfy?
8
Automatic Circuit Tuning

• Pros
• Fast
• Achieves the best performance with interconnect
  considerations
• Explores alternatives (power/delay/noise
  tradeoff)
• Boosts productivity
• Optimality guaranty (for convex problems)
• Insures timing and reliability
• Cons
• Complicated tool development and support ()
• Tool testing, integration, and training

9
Good Tuning Algorithm

• Fast
• Optimality guaranteed (for convex problem)
• Versatile
• Easy to use
• Solution quality index (error bound to the
  optimal solution)
• Simple (Easy to develop and maintain)

10
Static vs. Dynamic Sizing

• Static Sizing
• Stage Based
• Nature circuit decomposition, large scale tuning
  capability
• Very reasonable accuracy (when using good model)
• No need for sensitization vectors
• Solves for all critical paths in a polynomial
  formulation
• False paths Potentially inaccurate modeling of
  slopes of input excitation
• Dynamic Sizing
• Simulation based
• More accurate
• No false path problems
• Need good input vectors good for circuits for
  which critical paths are known and limited
• Takes care of a few scenario only
• Relatively slower

11
A Simple Sizing Problem

• Minimize the maximum delay Dmax by changing
  w1,,wn

w7
w9
w4
w1
D1ltDmax
a
w5
w10
D2ltDmax
b
w2
w6
w11
w3
w8
12
Existing Sizing Works

• Algorithm fast, non-optimal for general problem
  formulation
• TILOS (J. Fishburn, A. Dunlop, ICCAD 85)
• Weight Delay Optimization (J. Cong et al., ICCAD
  95)
• Mathematical Programming slower, optimal
• Geometrical Programming (TILOS)
• Augmented Lagrangian (D. P. Marple et al., 86)
• Sequential Linear Programming (S. Sapatnekar et
  al.)
• Interior Point Method (S. Sapatnekar et al., TCAD
  93)
• Sequential Quadratic Programming (N. Menezes et
  al., DAC 95)
• Augmented Lagrangian Adjoin Sensitivity (C.
  Visweswariah et al., ICCAD 96, ICCAD97)
• Is there any method that is fast and optimal?

13
Converge?
?
Mathematical Programming
Algorithm
14
Heuristic Approach

• TILOS (J. Fishburn etc ICCAD 85)
• Find all the sensitivities associated with each
  gate
• Up-Size one gate only with the maximum
  sensitivity
• To minimize the object function

Minimize Dmax
w2
w1
w3
w4
a
D1ltDmax
w5
w6
D2ltDmax
b
w11
w7
w9
w8
w10
15
Weighted Delay Optimization

• J. Cong ICCAD 95
• Size one wire at a time in DFS order
• To minimize the weighted delay
• best weight?

Minimize l1D1 l2D2
Drivers
Loads
w1
w2
w3
l1D1
l2D2
w5
w4
16
Mathematical Programming

• Problem Formulation
• Lagrangian
• Optimality (Necessary) Condition (Kuhn-Tucker
  Condition)

17
PSLP v.s. SQP

• Penalty Sequential Linear Programming
• Sequential Quadratic Programming

18
Lagrangian Methods

• Augmented Lagrangian
• Lagrangian Relaxation

19
Lagrangian Relaxation Theory

• LRS (Lagrangian Relaxation Subproblem)
• There exist Lagrangian multipliers will lead LRS
  to find the optimal solution for convex
  programming problem
• The optimal solution for any LRS is a lower bound
  of the original problem for any type of problem

20
Lagrangian Relaxation
Weighted Delay!
21
Lagrangian Relaxation
Lagrangian Relaxation
Sink WeightsMultipliers
Mathematical Programming
Algorithm
22
Lagrangian Relaxation Framework
Update Multipliers
Weighted Delay Optimization
Converge?
23
Lagrangian Relaxation Framework
More Critical -gt More Resource -gt More Weight
D1
D2
24
Weighted Minimization

• Traverse the circuit in topological order
• Resize each component to minimize Lagrangian
  during visit

Minimize l1D1 l2D2
w1
a
D1
D2
b
w2
w3
25
Multipliers Adjustmenta subgradient approach

• Subgradient An extension definition of gradient
  for non-smooth function
• Experience Simple heuristic implementation can
  achieve very good convergence rate
• Reference Non-smooth function optimization N.
  Z. Shor

26
Path Delay Formulation
d1
d2
Aa
D1
Ab
d3
D2
Ac

• Exponential growing
• More accurate
• Can exclude false paths

27
Stage Delay Formulation
d1
d2
Ae
Aa
D1
Ab
d3
D2
Ac

• Polynomial size
• Less accurate
• Contains false paths

28
Compatible?
?
Path Based
Stage Based
29
Both Multipliers Satisfy KCL(Flow Conservation)
Path Based
Stage Based
l43
1
l31
1
4
4
3
2
2
3
l32
5
5
l53
l3,in l3,out
l43 l53l31 l32
30
Mixed Delay Formulation
Stage Based
Stage Based
Path Based
31
Compatible?
Lagrangian Relaxation
Both Multipliers Satisfy KCL
Stage Based
Path Based
32
Hierarchical Objective Function Decomposition

• Divide the Lagrangian into who terms (containing
  or not containing variable wi )
• Hierarchically update the Lagrangian during
  resizing

33
Intermediate Variables Cancellation
Ae
Aa
D1
Ab
D2
Ac
lae
lae lbe le1 le2
lbe
le1

le2
lc2
lae (Aa d1 ) lbe (Ab d1 ) le1 (d2 - D1
) le2 (d3 - D2 )
34
Decomposition and Pruning

• Flow Decomposition
• Prune out all the gates with zero multipliers

35
Complimentary Condition Implications

• li (Di-Dmax ) 0
• Optimal Solution
• Critical Path, weight l i gt 0.0, path
  delayDmax
• Non-critical path, weight l i 0.0, path
  delay lt Dmax

36
Convergence Sequence
Max Delay
Any Feasible Maximum Delay Upper Bound
LagrangianLower Bound Weighted DelayltMaximum
Delay
Iteration
37
Transistor Sizing Extension
38
Runtime and Storage Requirement
39
Runtime versus Circuit Size
40
Storage versus Circuit Size
41
Convergence of Subgradient Optimization
42
Area vs. Delay Tradeoff Curve
43
Conclusion

• Lagrangian Relaxation
• General mathematical programming algorithm
• Optimality guarantee for convex programming
  problem
• Versatile
• No extra complication (no quadratic penalty
  function)
• Lagrangian multiplier provides connections
  between mathematical programming and algorithmic
  approaches
• Multipliers satisfy KCL (flow conservation)
• Hierarchical update objective function provides
  extreme efficiency
• Solution quality guaranteed (by providing lower
  bound)