New Crate Controller Development

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New Crate Controller Development

• A VMEbus Controller with Gigabit Ethernet
• A custom board designed and developed at OSU
• Based on XILINX Virtex-II Pro
• Custom firmware.
• Optical transceiver (for Gbit Ethernet)
• Communicates with stand-alone PC (in USC55) via
  Ethernet
• Status
• Prototype board produced.
• Gbit Ethenet and VME firmware being developed.
• Firmware has modular design. Each module
  simulated as it is written.
• Aiming to be ready for beam test in
  June.

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Firmware Components

• Clock Manager
• Master Control
• Ethernet Interface
• External FIFO Interface (for VME commands)
• Configuration Memory Interface (Flash Memory)
• VME Interface
• Command and Control Registers
• Error and Statistics Monitor
• Reset Handling

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Ethernet Interface

• Rocket IO (16 bit interface)
• Clock Recovery
• SERDES
• 8B10B Encoding
• Generates and checks CRC
• Receive Processing
• Transmit Processing

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Receive Processing Components

• MAC Frame Processor
• Identifies SOP, Preamble, SOF
• Matches MAC Address (Multicast, Broadcast)
• Stores MAC Source Address
• Checks Length
• Frame FIFO
• Stores Payload Data from Packet
• Keeps good Frames, Drops bad Frames
• Saves Lengths and MACs for each incoming Packet
• Payload Decode
• Readout FIFO
• Interpret Protocol and Decode Commands
• Generates OPCODE for Master Controller
• Error Monitoring
• Validates incoming Frames

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Transmit Processing Components

• Packet Builder
• FIFO for collecting Data before sending
• Track Length and Type of Data
• Tags New packets and packet Fragments
• Separate Path for Priority Packets
• Transmit MAC Frame
• Maintains Idle State
• Checks Data Type and Length from Packet Builder
• Builds Protocol Header based on Type
• Sequences Packet from various Sources
• (SOP, Preamble, SOF, MAC Destination, MAC Source,
  Length, Protocol, Data, Filler, CRC, EOP, Carrier
  Extend, Inter Packet Spacing)
• Error Monitoring

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