Upgrade Ideas

1
Upgrade Ideas

• They say to hope for the best and prepare for the
  worst
• They also say to be careful what you wish for.
• In other words, while its wise to prepare for
  the worst, if you hope for the best you should
  also prepare for the best.

2
The Best

• The Pixel detector we are building works
  extremely well.
• The LHC exceeds design luminosity.
• All sorts of new physics turn up.
• HEP funding goes through the roof.
• What do we do now?
• Major upgrade! Replace TRT with silicon strips,
  AND, replace SCT with pixels!

3
How does one build a multi-Gigapixel Detector?

• Replace Present flip chip bump bonding technology
  with something faster, cheaper, better.
• Unlikely for industry to develop fully automatic
  robotic flip chip bonding matched to our needs
  (chips and detectors go into conveyor belt,
  modules come out)
• Bump bonding does not scale well to smaller
  pitch- 50um is already a nightmare, but for
  upgraded inner layer we should have 25um x 100um
  pixels.
• Increase scale of integration to reduce
  cost/pixel.
• Effectively make the FE chip the size of an
  entire sensor (and also make bigger sensors!)

4
Alternative to bump bonding

• Sure theres active pixels and all that, but
  staying within what we know

Resistive metal film, thickness ltlt pixel
pitch. gt Cross talk is small (but note that some
cross talk is a good thing)
Sensor
Z-axis conductive medium. Note that NO alignment
at all is needed between chips and sensor. Pixel
geometry is defined on the chip- sensor
eventually could be a continuous medium.
Chip
5
Alternative to bump bonding (cont.)

• The nice thing about this scheme is that we have
  in hand all the parts needed to test it.
• The only RD needed
• Sputter metal films on FE chips and check the
  electrical performance. Optimize film thickness
  and resistance.
• Search for z-axis conductive media and try them
  out. Im already irradiating a sample from
  Btechcorp, who claim they are developing a z-axis
  medium for 25um pitch interconnections.
• Maybe get the nano technology crowd interested in
  developing better z-axis conductive media.
• If met with success, eventually look at sensor
  design. Probably the sensor can become a huge,
  non-segmented diode. At the very least the bias
  grid can probably be eliminated.

6
How does one make a huge chip

• With the kind of yields we see now that we make
  chips in commercial foundries, the chip could
  easily become the full reticle, but thats not
  big enough!
• Need to design defect-tolerant chips, so that
  that a single point defect can at worse produce a
  single dead pixel, but never a dead chip.
• One then does not dice out individual chips or
  individual reticles, but rather sensor-sized
  chunks of the electronics wafer.
• This approach would even work fine staying with
  the present module design, the only difference
  being that the 16 FE chips would now be on a
  single piece of silicon
• Note that this would probably be a nightmare for
  flip chip assembly, because the flip chip tool
  would have to maintain planarity over the whole
  module instead of one FE at a time, and the
  flipping force would be quite huge.