Specificationdriven Embedded SelfTest for MixedSignal Circuits using loopback

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Specification-driven Embedded Self-Testfor
Mixed-Signal Circuits using loopback

• Hongjoong Shin, Byoungho Kim and
• Jacob A. Abraham
• Computer Engineering Research Center
• University of Texas at Austin

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Loopback-based Testing

• Function-rich system (data converters and DSP)
• Core-level testing
• Uses test points to access individual cores
  (sequential tests)
• Loopback-based testing
• Loops one signal path back into another signal
  path
• Measure the combined performance of path
• Advantages
• Reduced test time parallel tests
• Digital-like Self Test

Conventional core-level test
Loopback-based test
bus
Baseband
Voiceband
Digital core
Tx analog modules
ADC
Tx analog modules
Digital core
ADC
Rx analog modules
DAC
Rx analog modules
DAC
bus
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Loopback-based Testing Limitations I
Fault masking

• Fault masking
• Combined response
• Distortion and noise of signal paths are additive
• Overqualified performance of one signal path
  masks a fault in another signal path
• Misclassification

Signal path B performance
Signal path A performance
faulty
Masked
Misclassifications ()
Standard deviation (dB)
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Loopback-based Testing Limitations II

• Analog systems with self-repair
• Overcomes parametric yield loss due to variations
  in process parameters
• Variations is increasing
• Finds optimal tuning point where all performance
  parameters meet specifications
• Loopback is insufficient to guide self-repair
  mechanism
• Which block fixed?
• How much tuned?
• Need to extract performance parameters of
  individual signal paths

fault-free
faulty
Signal path A performance
faulty
Signal path B performance
Tuning
Loopback performance
Analog systems with Self-repair
Digital core
ADC
DAC
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Proposed loopback Design For Test scheme

• Provide performance parameters of individual
  signal paths
• Avoid yield loss due to fault masking
• Effective in diagnosis and self-repair
• Extend DFT techniques onto loadboard (DFT
  circuitry on chip)
• Implement analog filter and adder on loadboard or
  as DFT circuitry
• Reduce silicon cost with minimal pin count (2
  dedicated pins)
• Compatible with existing loopback scheme
• Characterize harmonic distortion and noise
  parameters

Under Test
Load Board
DSP
ADC
PGA
Filter
DAC
PGA
Filter
Test Input
Loopback DFT circuits
DUT in a loopback mode
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Harmonic distortion extraction Basic idea
k a2 ß2
DAC channel
ADC channel
y
x cos(?0t)
z

• Requires the value of ß and a to estimate
  harmonic distortion (HD) of DAC and ADC channel
• Cannot determine the value of ß and a - Two
  unknown variables, but one equation
• If we can obtain additional equation which is
  orthogonal to the first equation
• For example, k1 a2 ß2 and k2 0.7a2 ß2
• Two unknown variables and two equations
• Can determine the value of ß2 and a2
• Our approach
• Doubles number of equations by scaling a with
  different weights

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Harmonic distortion extraction Our approach
DAC channel
Linear filter
y0
y0F
x0
x x0 x1
ADC channel
y
z
y1
x1
y1F

• Two-tone signal (?0 and ?1)
• x x0 x1 cos(?0t) cos(?1t)
• Models DAC channel as two identical non-linear
  systems
• Ignores IMD of x0 and x1
• Only interested in HD of ?0 and ?1 (?0 and ?1 are
  mutually prime)
• y0 is just shifted version of y1 in frequency
  domain
• Filter scales magnitude and phase
• of y0 and y1 with different weights
• Y0(?) (y0) and Y1(?) (y1)
• Y0(?) Y1(??)
• Y0F(?) ? Y1F(??)

Different weights
y0
y1
Phase response
f
ignored
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Distortion Characteristic Equations (DCEs)

• Obtains two orthogonal equations from z0 and z1
• k1 ea2 ß2 and k2 ?a2 ß2
• Can determine the value of ß and a
• Can be extended to nth-order

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Harmonic distortion extraction Summary
a
Linear filter
y0
y0F
x x0 x1
x0
y
z
DAC channel
ADC channel
y1
x1
y1F
ß
Loopback I
a
a
Different weights
y0F
y0
DAC chan.
ADC chan.
ß
y1
Loopback II
y1F
DAC chan.
ADC chan.
f
ignored
ß

• Loopback response represents the sum of
  input/output channel performance
• Loopback performance (DAC) performance (ADC)
• Excite output channel (ADC channel) with unknown
  input (output of DAC channel)
• Scaled by known filter magnitude response
  scaled by different scaling factors
• Analyze correlation between the obtained loopback
  responses
• Loopback I scaling factor a performance (DAC)
  performance (ADC)
• Loopback II scaling factor ß performance
  (DAC) performance (ADC)

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Noise Characteristic Equations (NCEs)

• Output referred noise of loopback response is
• Na Power Spectral Density (PSD) of DAC
• Nß PSD of ADC
• NH PSD of filter
• K Overall path gain
• H Transfer function of filter
• Use Equivalent Noise Bandwidth (ENB) to simplify
  the equation

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Equivalent noise bandwidth

• Equivalent Noise Bandwidth (ENB) to simplify the
  equation
• ENB fN is chosen to give the same total output
  noise voltage as the original transfer function

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Estimate noise using NCEs and NCPs

• Equation decomposed into frequency range 0 fN
  and fN ?
• Given characteristics of filter and NCPs
• Noise parameters of ADC/DAC channels can be
  extracted

NCEs
NCPs
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Results - simulation

• DAC-ADC loopback was modeled and simulated using
  MATLAB
• SINAD 66dB
• Performance parameters considered were SINAD, SNR
  and THD
• 1000 DUT ensembles were generated with normal
  distribution in value of noise and distortion

Prediction Errors
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Validation using hardware measurements

• Commercial broadband modem mixed-signal front-end
  IC
• AD9865
• Low cost 3.3V CMOS
• Tx/Rx data rates upto 80MSPS

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AD9865 Prototyped board
TX analog Output
Clock
TX digital Input
AD9865 Broadband Modem
Gain control switches
RX analog Input
RX digital Output
SPI Interface
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Functional block diagram AD9865

• Commercial broadband modem mixed-signal front-end
  IC
• Programmable using SPI registers

IOUT_P
Programmable Gain Amplifiers
IAMP
2_4X
IOUT_G
TxDAC

IOUT_N
TXEN/SYNC
-
10
TXCLK
CLK SYN
ADIO94/ Tx50
Input clock 5Mhz 80Mhz
OSCIN
2M CLK MULT
XTAL
ADIO30/ Rx50
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RX
Programmable Gain/BW (15Mhz 35Mhz)
RX -
RXE/SYNC
TxADC
MUX
RXCLK
3-POLE LPF
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Functional block diagram Test mode

• Programmable 3-pole filter is used to emulate the
  filter in the proposed scheme

Loopbacked in test mode
Bypassed in normal mode
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Measurement Setup
Data analysis LabView MATLAB
Hardware Controls SPI
Signal acquisition and stimulation LabView/NI DAQ
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Virtual fault injection

• Faults injected by
• Re-configuring Tx/Rx gain
• Sweeping power supplies
• Sweeping input amplitude
• Injected faults result in
• 20dB variations in SNR
• 7dB variations in THD
• 45 DUTs

SINAD and THD Vs. PGA gain
SINAD and THD Vs. Input amplitude
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Measurement setup
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Results SINAD prediction
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Results SNR prediction
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Results THD prediction
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Results Summary
SINAD
SINAD
predicted value
predicted value
Actual value (dB)
Actual value (dB)
(b) ADC channel
(a) DAC channel
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Thank you Any Questions?