PeX

1
PeX

• Parallel Execution Simulation Virtual Software
  Platform

Zain Asgar Adi Bittan Kyle Kelley Ofer
Shacham
2
The Team
Team Experienced in Multi-Core Architecture and
Applications

• CEO Adi Bittan
• CFO Kyle Kelley
• CTO Zain Asgar
• CMO Ofer Shacham

3
Opportunity

• Problem Simulation of large scale problems takes
  too much time and resources, or is not accurate
  enough

• Large scale problems include
• RTL simulation (400M)
• FEM simulation (2.7B)
• Financial simulation (300M)

• Too much time means
• Engineers wait 1-24hrs for simulation results
• Increased time to market

4
Opportunity

• Problem Simulation of large scale problems takes
  too much time and resources, or is not accurate
  enough

• Observations
• Disruptive Technology Multi-Core platforms
• Finite Element Modeling (FEM) is essentially a
  parallel problem why serialize it?

5
Opportunity

• Problem Simulation of large scale problems takes
  too much time and resources, or is not accurate
  enough

Solution High speed virtual simulation engine
PEX Virtual Simulation Platform
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Opportunity Overview
Customer Tradeoff Alleviated
Increasing
PEX XSim
Design Confidence
Current Solutions
Time Saved
Increasing
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Technical Overview
RTL (EDA)
Financial
FEM
Compiler
Compiler
Compiler
Virtual Code
PEX Virtual Simulator
Niagara
GPGPU
GPCPU
Cell Processor
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Calculating Pressures Using FEM

• Total Pressure is sum of all neighboring
  pressures
• P P1 P2 P3 P4

9
How is it done today?
Input
Calculation for each node is done in a serial
manner
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How does PEX make it faster?
Compiler
Generates Data Flow Information
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Market Opportunity
Source Annual reports
12
Competitive Landscape
5-7 Growth rate Consolidated Market
13
Competitive Landscape FEM
8-12 Growth rate Fragmented Market Some
consolidation/acquisitions trends
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RTL Simulation Customers

Any company doing digital hardware design
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FEM Simulation Customers

Any company doing digital mechanical design
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What do our customers think?

• Siva K. Yerramilli, VP, Intel
• Regarding your questions, RTL speed-up is VERY
  important to us
• Don Stark, Former VP of Engineering, Rambus
  Switching cost is high, however, companies will
  switch for a 10X faster simulator
• Design Engineer at Thyssen auto parts mft.
  faster simulations would save me hours of time
• Senior financial analyst at Exelon
• We never had enough time to run all the
  simulations we needed to forecast prices

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Business Model
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Marketing Approach
Different Pitching Angles
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Development Roadmap
Year 1

• Develop virtual engine for GPU
• Develop complier for RTL simulation

Year 2

• Develop compiler for FEM automotive industry
• Expand engine to multiple platforms
• First sales of RTL SW

Year 3

• Develop compiler for FEM aerospace industry
• Develop compiler for financial simulations
• First sales of FEM SW

Year 4

• Expand to multiple FEM industries
• First sales of financial simulations

Year 5

• Expand to bio-pharma simulation

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Financial Assumptions

• Revenues based on Magma mkt. penetration in
  similar mkt.
• Price 50k per user annual license
• Costs based on primary research confidential
  look at a start-ups financials
• Engineer salary 110k
• Equipment per person 5000
• Sales person salary 60k 10 commission
• New sales team added for every new target
  industry
• First 5 years engineers double as support staff
• Employees compensated with equity

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Proxy Magma Design Automation

• Magma creates software for the physical design
  stage of chip development
• Entered a segment of the EDA market with same
  dominant competitors in 1997
• Gained 24 market share (revenue basis) within 10
  years
• IPO November 2001
• Fiscal 2007 revenues 178M

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Costs
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Financial Projections
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Net Income Projection
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Cumulative Finance Projection
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Backup Slides

• General Tech Backup slides
• What does Intel think about multi-core
  architectures?
• Current Solutions dont Scale
• Raw Compute Power GPU vs. CPU
• Current Solutions dont Map Well to Multi-Core
  Architectures
• GPU Tech Backup slides
• Expected Speedup (GPU)
• GPU Architecture
• Why are GPUs Better for FEM?
• GPU Compute Solutions
• EDA Backup Slides
• RTL Verification Gap
• Chip Design Process

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What does Intel think about multi-core
architectures?

• Processors architecture is evolving towards more
  software-exposed parallelism through two
  features more cores and wider SIMD ISA. At the
  same time, graphics processors (GPUs) are
  gradually adding more general purpose programming
  features.
• http//www.intel.com/research/platform/terascale/T
  eraScale_whitepaper.pdf

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Current Solutions dont Scale
But not any more!!
Processors speed used to double every 18months
Speed
Year
Source Professor Mark Horowitz, Stanford
University
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Current Solutions dont Map Well to Multi-Core
Architectures
Event Queue

• Event Based Simulation
• Directed Acyclic Graph Topology
• Global Queue to Schedule Events
• Pros Nodes evaluate their input only when they
  change
• Cons For each node evaluation, a message is
  sent from the queue to the node (and back)

Directed Graph Topology
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Raw Compute Power GPU vs. CPU

• Intel Core 2 Due 2 cores
• AMD Optron 2 cores
• IBM Cell 8 Cores
• SUNs Niagara 8 cores
• NVIDIA GPU 128 cores

SourceNVIDIA Cuda Manual
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Expected Speedup (GPU)
Ian Buck, Siggraph 2007, NVIDIA Corporation
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GPU Architecture
Ian Buck, Siggraph 2007, NVIDIA Corporation
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Why are GPUs Better for FEM
Ian Buck, Siggraph 2007, NVIDIA Corporation
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GPU Compute Solutions
7500
12,000
1,299
Cost
256
512
128
Cores
GigaFlops
gt1000
gt2000
518
80
120
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Intel Equivalent
Relative Power Efficiency 10 Relative Hardware
Cost Benefit 10
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Magma Mkt. Penetration
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FRAGMENTED PLM MARKET

• http//www.mscsoftware.co.kr/event/vpd2005/VPD_HP.
  pdf

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Techology Risk

• NVIDIA may decide not to support double precision
  floating point
• Single precision is ok for EDA and Financial
• Double precision can be emulated
• CPU to GPU bandwidth a limitation
• Next generation PCI Express will solve this
• Large GPU memory will hide latency
• NVIDIA may decide to stop supporting CUDA
• Virtualization platforms -gt Use other platforms

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RTL Verification Gap
Match the design slop
100x Faster
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Chip Design Process
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Strategic Partnership Options

• NVIDIA
• Promote their GP-GPU platforms (CUDA)
• Andy Keane Director of Compute Marketing
• Nvidia enters into partnerships with GPGPU
  startups
• Intel
• Slowly going into GP-CPU platforms
• Spoke to Shispal Rawat Intel Capital
• Very interested in virtual simulation platform
• SUN
• Promote their new multi-core processors

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RTL Simulation
Compiler
Code
Virtual Machine
Current Values
Always _at_ A B C A_d Always _at_(posedge
Clk) A_d lt A
Next Values

• Same Virtual Engine
• Compiler Customized
• Data management is harder

Manages Memory And Execution