ICE 12212243 Spring 2006 Digital Logic Design Lab

1
ICE 1221/2243 Spring 2006 Digital Logic Design
Lab
Lecture 1 Introduction
Feb. 20, 2006 Mon 100-230 pm, L104
Hae-Wook Choi
Associate Professor School of Engineering,
ICU hwchoi at icu.ac.kr 866-6901
2

• Outline
• Course Overview
• Motivation
• Course Map
• Lecture/Lab Hours and Locations
• Course Materials
• Course Grading
• Lab Project
• Course Schedule
• Chapter 1 Digital Computers and Information

3

• Issues in Digital Logic Design
• What is Digital Logic Design?
• What is Design?
• What is Digital Logic?
• What is Logic?
• A method of reasoning that involves a series of
  statements, each of which must be true if the
  statement before it is true

4

• Issues in Digital Logic Design (Contd)
• A statement (or a proposition) is true or false,
  i.e.
• binary.
• Logic Operation (Function)?
• - Negation (NOT), Disjunction (OR),
  Conjunction (AND)
• Truth Table

5
How can the logic be realized?

• Any kind of material (Hardware) that shows these
  logic functions might be good.
• Does any material exist that shows exactly the
  logic functions in real world?
• - If yes, what? If not, why?
• Take an example material that approximately
  shows them. Explain its function.

6
What are the realized logics problems?

• The realized logic is not ideal, that is, it has
  limitations.
• (Assume it shows stable logic functions,
  i.e., repeatability.)
• - delay in realization
• - power consumption
• - size
• (Speed, Power, Size of a digital logic and
  their origins)
• What is the bridge between the real world and
  the digitalized one?
• Then, what is the target of Digital Logic
  Design?
• - FSPS (Function, Speed, Power, Size)
• Why CMOS technology?

7
Why do we learn the digital logic design?

• A logic function, simple or complex, is
  implemented in hardware, even a high level
  language program.
• Some application needs the very high speed
  operation with low power and low cost. gt
  Hardwired Logic Design
• - Ex Mobile phone SoC ( System-on-Chip) in
  100 MHz
• (10mW, 10)
• Approach gt Learn bottom-up, Design top-down.

8
What are the outputs of digital logic design ?

• From primitive function circuits to complex
  ones.
• - NOT, AND, OR
• - Adder, Multiplier
• - ALU (Arithmetic Logic Unit)
• - Latch, Flip-flop
• - Register, Memory
• - FSM (Finite State Machine)
• - Algorithmic non-programmable circuits,
  Programmable circuits
• Ex Modem (Modulator and Demodulator), CPU
  (Central Processing Unit)
• - SoC (System-on-Chip), NoC (Network-on-Chip)

9
What are the applications of digital logic design
?

• Wireless communication SoC design
• Multimedia system SoC design
• Home gateway SoC design
• Robot SoC design
• Bio-informatic SoC design
• Etc.

10
The System Design Process
System
Functions, performance, cost, development time
specification
Test basic algorithms and show meeting
requirements (ex a performance level in noisy
env.(wireless comm), compression/decompression
losses (video processing))
Behavioral model
REFINE and TEST

• Coding in C/C with all floating point
  operations for quick algorithm debugging
• A fixed-point model development for accuracy
  decision for performance with min. area
• A cycle-accurate bit-accurate model development
  for realistic implementation

Behavioral model
Hardware/software
Partition
Hardware architectural
Software
- Manual process based on judgment experience
and cost/performance tradeoffs for various
architectures - Define I/F btwn HW SW and
specify comm. protocols
model
prototype
architectural model
(Hardware/software co-simulation)

• Determine HW blocks and their communications
• memory architectures, bus structures bandwidth
• running of transaction-level models to model I/F
  bus behavior (faster than RTL models without
  detailed pin and signal behavior) gt SystemC
  modeling

SPECIFY
SPECIFY
Implementation blocks
Software
Block1
Specification
- Architectural model used for HW/SW
co-simulation with SW development and debugging
on it - Fast and accurate models of HW are key to
co-simulation
Block2
Specification
.
- A detailed spec of the functionality,
performance, I/F for HW system and its
component blocks ( functions, timing, area,
power, physical SW I/F, I/O pin description and
register map)
11
Digital Logic Design Lab(DLDL)
Course Map

• Digital Computer Information Overview (CH.1)
• Number Systems
• Arithmetic Operations
• Decimal Codes/Gray Codes/ASCII Codes

• Combinational Logic Circuit Design (CH. 2, 3, 4
  5)
• Combinational Circuits (Binary Logic
  Gates/Boolean Algebra/ Standard Forms/ K-map)(CH.
  2)
• Combinational Logic Design (Design Concepts and
  Automation/Design Procedure/Technology Mapping)
  (CH. 3)
• Combinational Functions (Decoder/Encoder/Mux/Dem
  ux/ROM/PLA/PAL) (CH. 4)
• Arithmetic Functions (Adder/ Subtractor /
  Multiplier) (CH. 5)

• Sequential Circuit Design (CH. 6, 7, 8)
• Sequential Circuits (Latches / Flip-Flops/ State
  Diagram /Design)(CH.6)
• Registers Register Transfers ( Register
  Transfers /Micro-operations)(CH.7)
• Sequencing Control (Control Unit / ASM /
  Hardwired Control)(CH.8)

• Memory Basics (CH. 9)
• RAM / SRAM / DRAM / DRAM Arrays

• Computer Design Basics (CH.10)
• Datapath Control Unit (CH.10)
• Single vs. Multi-Cycle Computer Architecture

Instruction Set Architecture (CH. 11)
RISC and CISC Central Processing Units (CH. 12)
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• Lecture/Lab hours and locations
• Lecture
• - Monday 1300 1430 L104
• - Wednesday 1300 1430 L104
• Lab
• - Monday 1900 2100 L507 (Lab A)
• - Tuesday 1900 2100 L507 (Lab B)
• - Wednesday 1900 2100 L507 (Lab C)
• - Thursday 1900 2100 L507 (Lab D)

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• Attendance
• Attend regular lectures.
• Lectures will be focused on the building logic
  blocks of the target digital system (module). The
  related logic blocks will be open to the
  homework.
• Attend your lab section.
• Lab experiment will be based on the HDL
  (Hardware Description Language) simulation of the
  building logic blocks covered by the lectures,
  using Verilog simulator, ModelSim. Assembly of
  all the building logic blocks covered will
  constitute the final target system, which becomes
  the lab term project.
• No attendance at the lecture class or at the lab
  section more than one fourth of the total classes
  or lab sections will result in F grade for the
  course.

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• Course Materials
• Textbook
• Logic and Computer Design Fundamentals M.
  Morris Mano and Charles R. Kime, Prentice Hall,
  2004 3rd Edition
• - Related Books
• . Contemporay Logic Design, Randy H. Katz,
  Benjamin/Cummings
• Publishing 1994.
• . Digital Design, M. Morris Mano, Prentice
  Hall, 2002
• . The Verilog Hardware Description
  Language, Thomas Moorbys
• Kluwer Academic Publishers 1998.
• Class notes, homework lab assignments,
  solutions, and other documentation will be
  available on the class webpage in AIMS
• - homework and lab reports will be
  submitted at the beginning of the class
• and lab
• - check the class webpage in AIMS often!

15

• Course Grading
• Midterm (20), Final (30)
• 2 Quiz (10)
• - 1 Quiz before mid-term exam and 1 before
  final exam
• Weekly Homework (10)
• - Homework due the 2nd day (Wednesday) of
  the following week
• Lab/Term Project (25)
• - Verilog simulation of modules for the
  term project and final report
• - Lab report due at the beginning of the
  following lab
• Attendance( 5)

16

• Lab Project
• Target system of the project is a 16-bit
  Multi-Cycle Computer in chapter 10 of the text.
• The computer is composed of datapath, control
  unit and memory.
• Each part is sub-divided by combinational,
  sequential and/or memory module.
• These modules are comprised of small modules or
  primitive modules.
• The project will be done by bottom-up approach.
• Most of the functional modules will be covered
  during the lecture.
• Everyone will design, implement, and debug the
  Multi-Cycle Computer with ones own customized
  instruction inserted.

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Block Diagram for a Multi-Cycle Computer
18
Block Diagram of a Generic Datapath
Load enable
A select
B select
Write
A address
B address
n
D data

• Four parallel-loadregisters
• Two mux-based register selectors
• Register destination decoder
• Mux B for external constant input
• Buses A and B with externaladdress and data
  outputs
• ALU and Shifter withMux F for output select
• Mux D for external data input
• Logic for generating status bitsV, C, N, Z

Load
R0
2
2
n
n
Load
R1
0
n
1
MUX
2
n
3
0
1
MUX
Load
2
R2
3
n
n
Load
R3
n
n
0
1
2
3
n
Register file
Decoder
A data
B data
D address
n
n
2
Constant in
Destination select
n
1
0
MB select
MUX B
Address
n
Bus A
Out
n
Bus B
Data
A
B
Out
n
G select
H select
B
A
B
4
2
S
S
C
20
in
I
I
V
Shifter
0
0
Arithmetic/logic
L
R
unit (ALU)
C
H
G
N
n
n
Z
Zero Detect
0
1
Function unit
MF select
MUX F
F
Data In
n
n
0
1
MD select
MUX D
Bus D
n
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Datapath Example Performing a Microoperation

• Microoperation R0 ? R1 R2

20
Arithmetic Logic Unit (ALU)

• The next most significant select signals, S0 for
  the arithmetic circuit and S1 for the logic
  circuit, are wired together, completing the two
  select signals for the logic circuit.
• The remaining S2 completes the three select
  signals for the arithmetic circuit.

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The Control Word Format for Multi-Cycle Computer

• Fields
• NS Next State
• PS Present State
• IL Instruction Load
• DX Destination Register Select
• AX, BX Source A, B Register Select
• MB Mux B
• FS Function Select
• MD Mux D
• RW Register Write
• MM Mux M
• MW Memory Write

22
Control Word Block Diagram
23
Datapath Simulation
24
Course Schedule (Spring 2006)
Notes) Lab Capacity is limited to 21 persons
max, so take one among 4 lab hours, Monday night
(Lab A) (1900-2100) or Tue (Lab B) or Wed (Lab
C), or Thu (Lab D).
25
Chapter 1 Digital Computers and Information
1-1 Digital Computers 1-2 Number Systems 1-3
Arithmetic Operations 1-4 Decimal Codes 1-5 Gray
Codes 1-6 Alphanumeric Codes 1-7 Summary
26
1-1. Digital Computers

• General-Purpose Digital Computer
• ? follows a program that operates on given
  data.
• ? the best known example of a digital system
• ? manipulation of discrete elements of
  information
• ? discrete elements of information represented
  by signals
• (ex voltages and currents)
• ? signals in the most electronic digital
  system gt binary

27
Voltage Ranges for Binary Signals - 5-V Power
Supply Case-
Threshold Region
28
DC Operation Voltage Transfer Characteristic
Voltage Levels VOH f(VOL) VOL f(VOH) VM
f(VM)
29
Mapping between analog and digital signals
30
Definition of Noise Definition of Noise Margins
31
Noise Budget
? Allocates gross noise margin to expected
sources of noise ? Sources supply noise, cross
talk, interference, offset ? Differentiate
between fixed and proportional noise sources
32
Information Representation

• General-Purpose Digital Computer
• ? bit binary digit 0, 1
• ? information represented by groups of bits
• gt ? binary numbers
• ? discrete symbols
• ? instructions
• ? data

33
Computer Structure

• I/O Devices
• ? Hard Disk, CD-ROM Drive, Scanner
• ? Analog CKT, Optical Sensors, CRT or LCD,
• Electromechanical Components

34
Generic Computer

• Processor gt 4 functional modules
• ? CPU, FPU, MMU, internal cache
• ? FPU Floating-Point Unit (e.g., 1.234 x
  107)gt large
• small number handling
• ? MMU Memory Management Unit
• ? BUS interface Processor bus, I/O bus,

35
1-2. Number Systems

• A Number in base r (or radix r) power series
  in r

• A Number in positional notation coefficients
  and radix point only

• base-r number conversion to decimal example

36
Binary Numbers

• A Number in base 2(or radix 2) power series in
  2

1x25


1x20

1x2 -2
(110101.11)2

1x22


1x2 -1
1x24
32
16


4

1

(53.75)10
0.5

0.25

• K (kilo), M (mega), and G (giga)

? K (kilo) 210
? M (mega) 220
? G (giga) 230

• decimal to binary conversion example

29
26


25

2 4
(625)10


2 0

(1001110001)2
37
Octal and Hexadecimal Numbers

• Octal Number in base 8(or radix 8) power
  series in 8

1x82
2x81

(127.4)8

7x80


4x8 -1
(87.5)10
64
16


7

1


0.5

• Hexadecimal Number in base 16(or radix 16)
  power series in 16

(10 digits from the decimal system and A, B, C,
D, E F for 10,11, 12, 13, 14, 15)
11x163
6x162


5x161


15x16 0
(B65F)16

(46687)10
38
Conversion between Binary and Octal or
Hexadecimal Numbers

• Between Binary and Octal Numbers

(26153.7406)8

(010 110 001 101 011.111 100 000 110)2
3-bit block

• Between Binary and Hexadecimal Numbers

(2C6B.F06)16

(0010 1100 0110 1011.1111 0000 0110)2
4-bit block
39
Number Ranges in Digital Computers

• Number of bits in digital computer structure

?
8, 16, 32, 64 bit computers

• Range of integers for 8, 16, 32,64 bit computers

? 8 bit gt 0 to 28 - 1
? 16 bit gt 0 to 216 1 (64K-165,535)
? 32 bit gt 0 to 232 1 (4G-14,294,967,295)
? 64 bit gt 0 to 264 1 (18,446,744,073,709,551
,615)

• Range of fractions for 16 bit computer

? 16 bit gt 0 to(216 -1) / 216 ( 0.0 to
0.9999847412)
40
1-3. Arithmetic Operations

• Binary Addition example

Carries 101100
Augend 10110
Addend 10111
Sum 101101
Partial Product (LSB)
Partial Product (LSB1)
Partial Product (MSB)
41
1-4. Decimal Codes
(0001 1000 0101)BCD
(185)10

4-bit block

(10111001)2
42
Parity Bit
To detect errors in data communication and
processing, an additional bit added to a binary
code word to define its parity.
Even Parity Odd Parity
7-bit binary code word
1000001
01000001
11000001
1010100
11010100
01010100
send LSB first
MSB last
parity bit added
43
1-5. Gray Codes
Definition A code having the property that
only one bit at a time changes between codes
during counting.
Advantage Low power consumption for continuous
counting. Ex) A Gray code for 3 binary code
words ? 57 ( 8/14) of the
consumption of binary counter.
44
1-6. Alphanumeric Codes
ASCII American Standard Code for
Information Interchange (7 bit code
for 128 characters)
94 printable characters 34 non-printable
control characters - format effectors
(BS, HT, CR, ..) - information separators
(RS, FS, ..) - communication control
characters (STX, ETX, ..)

• Code ex) NAK Negative Acknowledge
• 0010101 gt 10010101(even parity)
• ACK Acknowledge
• 0000110 gt 00000110(even parity)

45
1-7. Chapter 1 Summary
We have introduced

• Digital Computer using signals with two values
• Computer Structure with a block diagram
• Number System with base (radix) and radix point
• - Binary numbers
• - Octal (base 8) and Hexadecimal (base 16)
  numbers
• - BCD (Binary Coded Decimal)

• Parity bit
• Gray Code
• Alphanumeric Code