Cadence DFII and MIT 3DM2 - PowerPoint PPT Presentation

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Cadence DFII and MIT 3DM2

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Schematic Capture. Simulation. Compare and Analyze. Design ... Layout versus Schematics (LVS) Electrical Rule Check (ERC) Parameter Extraction (PEX) ... – PowerPoint PPT presentation

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Learn more at: https://www.uidaho.edu
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Tags: 3dm2 | dfii | mit | cadence

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Title: Cadence DFII and MIT 3DM2


1
Cadence DFII and MIT 3DM2
  • Kevin Buck

2
Design Flow
Design Requirements Topology Choice Calculations
Schematic Capture Simulation Compare and
Analyze
Design Requirements Component Layout System
Layout Parameter Extraction Simulation Compare
and Analyze
3
Standard Design Flow
  • Identify Design Requirements
  • Subcomponents
  • Design subcomponents
  • Calculations
  • Simulations
  • Compare against requirements
  • Assemble all components
  • Full system simulation and compare with design
    requirements.

4
Post Design Process
  • Layout
  • Components
  • Systems
  • Full chip
  • Extract layout parasitics
  • Resistance
  • Capacitance
  • Why not Inductance?
  • Simulate and evaluate

5
Verification
  • Comparison with Design Requirements
  • Simulations and Calculations
  • Layout
  • Design Rule Verification (DRC)
  • Layout versus Schematics (LVS)
  • Electrical Rule Check (ERC)
  • Parameter Extraction (PEX)
  • Simulation
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