CSE 246: Computer Arithmetic Algorithms and Hardware Design

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CSE 246 Computer Arithmetic Algorithms and
Hardware Design
Fall 2006 Lecture 10 Floating Point Number
Rounding, Polynomial Expression

• Instructor
• Prof. Chung-Kuan Cheng

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Topics

• Rounding F.P. Numbers
• Polynomial Expression

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Rounding the numbers

• Why we need the
• Guard bit
• Round bit
• Sticky bit

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Example 1

• 1.00000 24
• -1.10000 2-3
• Normalize according to exponent
• 1.00000 24
• -0.00000011 24
• 0.11111101 24
• Renormalize
• 1.1111101x23
• Result 1.11111x23

Sticky Bit
Round bit
Take 5 bits after decimal
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Rounding

• We need only one guard bit for normalization
  after addition.
• Assumption Operands are normalized.
• Why?

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Example 2

• 1.00001 23
• -1.01011 2-1
• Normalize according to exponent
• 1.00000 23
• -0.000101011 23
• 0.111100101 23
• Renormalize
• 1.11100101 22
• Result 1.11101 22

Bit on the boundary
Round bit
Take 5 bits after decimal
Non-zero gt round-up
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Theory behind it
g
r

guard
Other bits
round
OR
Sticky bit

• When shifting right, dont need to remember
  anything more than 3 bits below
• This is a necessary and sufficient condition

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• Polynomial Approximation of Functions

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Taylor Series

• f(x) f(x0)
• Example
• sin(x) x x3/3! x5/5! x7/7!

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Taylor Series

• Given
• PN(x)
• c0x(c1x(c2x(cN-1xcN)))))
• R(N) cN
• R(i-1) ci-1xR(i)
• PN (X) R(0)

How to calculate value of function?
Recursively
Group common factors .
N multiples and adds
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Taylor Series

• 1 adder gt do it in series
• Given more components gt can we go faster?
• Take N 7 as example
• c7x7c6x6c5x5c4x4c3x3c2x2c1x1c0
• How to accelerate?

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Taylor Series

• c7x7c6x6c5x5c4x4c3x3c2x2c1x1c0
• Use 3 stages to generate xk
• Use xk to generate the polynominal expression.

x
x
x
x
x
x
x
x
x2




x3
x4
Carry-save constant time


x5
x6
x7

Log n
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Taylor Series

• c7xc6 c5xc4x c3xc2
  c1xc0
• x2(c7xc6)c5xc4x x2(c3xc2) c1xc0
• x4 x2(c7xc6)c5xc4xx2(c3xc2)
  c1xc0
• This is a bit faster. Only 2 stages
• But what is fastest way to produce result?
  energy efficient?
• gt minimize of multiplies
• All this uses s and xs. Need to get rid of
  them.
• gt Lets to try table look-up

x
x2
x4
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Taylor Series Table look-up

• SRAM/DRAM gt eat power
• ROM gt better option
• f(x)
• Suppose there is a table as a binary tree.
• Let x xH xL x0 xH
• Example
• X 110101
• xH 110000 f(xH xL)
• xL 000101

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Taylor Series Table look-up

• 1st order
• f(xH xL)
• gt Only 1 multiplication !!!

f(xH)
Table-1
xH

f(xH xL)
f(xH)
x
Table-2
x
xL
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Taylor Series

• With extra order gt 1 Extra table and 1
  multiplier
• If you wish to change the function, all you have
  to do is just change the content of the table
• Problem? gt Now its the size of the table!

2L
L
/
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Taylor Series

• Lets reduce X into 3 sections (instead of the
  previous 2 (High and Low) )
• x x1x22-kx32-2k
• gt
• f(x) f(x1x22-k)x32-2k f (x1) Epsilon
• E 2-3k
• f(x) requires a 2n x Vn table
• 2n of bits of x
• Vn bits of f(x)
• 32bit x gt 232 x 232 264 64 bits -gt HUGE!!
• -gt but do we really need all those s in the
  table??

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Taylor Series

• Let E epsilon, Lower limit
• xy (xy)2 / 4 (x-y)2 / 4
• ( (xy)/2 E/2 )2 - ( (x-y)/2 E/2 )2
• (xy)/2 2 - (x-y)/2 2 - E y

x
Content of lower bits determines lower bits of
result, but not other bits !!

Table
x2

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Taylor Series

• 2n x V vs. 2n x (v-w ) 2L x w
• 2n x v (2n x w - 2L x w )
• 2n x v w (2n - 2L )
• Size of table is reduced by

2n x v
n
v
/
x
/
f(x)
2n x (v-w)
v-w
n
/
x
/
f(x)
w
2L x w
L
/
/