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Chapter 10 HCS12 Serial Peripheral Interface

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bra getsspi0. donegs0 clr 0,x ; terminate the string with ... bra forever ; start from the start of the table. Program to display 87654321 on display #7 to #0 ... – PowerPoint PPT presentation

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Title: Chapter 10 HCS12 Serial Peripheral Interface


1
Chapter 10HCS12 Serial Peripheral Interface
2
What is Serial Peripheral Interface (SPI)?
  • SPI is a synchronous serial protocol proposed by
    Motorola to be used as standard for interfacing
    peripheral chips to a microcontroller.
  • Devices are classified into the master or slaves.
  • The SPI protocol uses four wires to carry out the
    task of data communication
  • MOSI master out slave in
  • MISO master in slave out
  • SCK serial clock
  • SS slave select
  • An SPI data transfer is initiated by the master
    device. A master is responsible for generating
    the SCK signal to synchronize the data transfer.
  • The SPI protocol is mainly used to interface with
    shift registers, LED/LCD drivers, phase locked
    loop chips, memory components with SPI interface,
    or A/D or D/A converter chips.

3
The HCS12 SPI Modules
  • An HCS12 device may have from one to three SPI
    modules.
  • The MC9S12DP256 has three SPI modules SPI0,
    SPI1, and SPI2.
  • By default, the SPI0 share the use of the upper 4
    Port S pins
  • PS7 ? SS0 (can be rerouted to PM3)
  • PS6 ? SCK0 (can be rerouted to PM5)
  • PS5 ? MOSI0 (can be rerouted to PM4)
  • PS4 ? MISO0 (can be rerouted to PM2)
  • By default, the SPI1 shares the use of the lower
    4 Port P pins
  • PP3 ? SS1 (can be rerouted to PH3)
  • PP2 ? SCK1 (can be rerouted to PH2)
  • PP1 ? MOSI1 (can be rerouted to PH1)
  • PP0 ? MISO1 (can be rerouted to PH0)
  • By default, the SPI2 shares the use of the upper
    4 Port P pins
  • PP6 ? SS2 (can be rerouted to PH7)
  • PP7 ? SCK2 (can be rerouted to PH6)
  • PP5 ? MOSI2 (can be rerouted to PH5)
  • PP4 ? MISO2 (can be rerouted to PH4)
  • It is important to make sure that there is no
    conflict in the use of signal pins when making
    rerouting decision.

4
SPI Related Registers (1 of 6)
  • The operating parameters of each SPI module are
    controlled via two control registers
  • SPIxCR1 (x 0, 1, or 2)
  • SPIxCR2
  • The baud rate of SPI transfer is controlled by
    the SPIxBR register.
  • The operation status of the SPI operation is
    recorded in the SPIxSR register.
  • The contents of the SPIxCR1, SPIxCR2, SPIxBR, and
    SPIxSR registers are illustrated in Figure 10.1
    to 10.4, respectively.
  • The SS pin may be disconnected from SPI by
    clearing the SSOE bit in the SPIxCR1 register.
    After that, it can be used as a general I/O pin.
  • If the SSOE bit in the SPIxCR1 register is set to
    1, then the SS signal will be asserted to enable
    the slave device whenever a new SPI transfer is
    started.
  • The equation for setting the SPI baud rate is
    given in Figure 10.3.

5
SPI Related Registers (2 of 6)
6
SPI Related Registers (3 of 6)
7
SPI Related Registers (4 of 6)
8
SPI Related Registers (5 of 6)
9
SPI Related Registers (6 of 6)
  • Example 10.1 Give a value to be loaded to the
    SPIxBR register to set the baud rate to 2 MHz for
    a 24 MHz bus clock.
  • Solution 24 MHz ? 2 MHz 12. One possibility is
    to set SPPR2-SPPR0 and SPR2-SPR0 to 010 and 001,
    respectively. The value to be loaded into the
    SPIxBR register is 21.
  • Example 10.2 What is the highest possible baud
    rate for the SPI with 24 MHz bus clock?
  • Solution The highest SPI baud rate occurs when
    both the SPPR2-SPPR0 and SPR2-SPR0 are 000. In
    this case the baud rate is 24 MH ? 2 12 MHz.

10
SPI Transmission Format (1 of 3)
  • The data bits can be shifted on the rising or the
    falling edge of the SCK clock.
  • Since the SCK can be idle high or idle low, there
    are four possible combinations as shown in Figure
    10.5 and 10.6.
  • To shift data bits on the rising edge, set
    CPOL-CPHA to 00 or 11.
  • To shift data bits on the falling edge, set
    CPOL-CPHA to 01 or 10.
  • Data byte can be shifted in and out most
    significant bit first or least significant bit
    first.

11
SPI Transmission Format (2 of 3)
12
SPI Transmission Format (3 of 3)
13
Bidirectional Mode (MOMI or SISO)
  • A mode that uses only one data pin to shift data
    in and out.
  • This mode is provided to deal with peripheral
    devices with only one data pin.
  • Either the MOSI pin or the MISO pin can be used
    as the bidirectional pin.
  • When the SPI is configured to the master mode
    (MSTR bit 1), the MOSI pin is used in data
    transmission and becomes the MOMI pin.
  • When the SPI is configured to the slave mode
    (MSTR bit 0), the MISO pin is used in data
    transmission and becomes the SISO pin.
  • The direction of each serial pin depends on the
    BIDIROE bit of the SPIxCR2 register.
  • The pin configuration for MOSI and MISO are
    illustrated in Figure 10.7.
  • If one wants to read data from the peripheral
    device, clear the BIDIROE bit to 0.
  • If one wants to output data to the peripheral
    device, set the BIDIROE bit to 1.
  • The use of the this mode is illustrated in
    exercise problem 10.8.

14
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15
Mode Fault Error
  • If the SSx signal goes low while the SPIx is
    configured as a master, it indicates a system
    error where more than one master may be trying to
    drive the MOSIx and SCKx pins simultaneously.
  • The MODF bit in the SPIxSR register will be set
    to 1 when mode fault condition occurs.
  • When mode fault occurs, the MSTR bit will be
    cleared to 0 and the output enable for the MOSIx
    and SCKx pins will be deasserted.

16
SPI Circuit Connection
  • In an SPI system, one device is configured as a
    master. Other devices are configured as slaves.
  • The circuit connection for a single-slave system
    is shown in Figure 10.8.
  • A multi-slave system may have two different
    connection methods as illustrated in Figure 10.9
    and 10.10.
  • In Figure 10.9, the master can exchange data with
    each individual slave without affecting other
    slaves.
  • In Figure 10.10, all the slaves are configured
    into a larger ring. A data transmission with
    certain slaves will go through other slaves.

17
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18
  • Example 10.3 Configure the SPI0 to operate with
    the following setting assuming that E
  • clock is 24 MHz
  • 6 MHz baud rate
  • Enable SPI0 to master mode
  • SCK0 pin idle low with data shifted on the rising
    edge of SCK
  • Transfer data most significant bit first and
    disable interrupt
  • Disable SS0 function
  • Stop SPI in Wait mode
  • Normal SPI operation (not bidirectional mode)

19
  • Solution fE / baud rate 24 MHz/6 MHz 4. We
    need to set SPPR2-SPPR0 and SPR2-SPR0 to 001 and
    000, respectively. Write the value 10 into the
    SPI0BR register.
  • The following instruction sequence will configure
    the SPI0 as desired

movb 10,SPI0BR set baud rate to 6
MHz movb 50,SPI0CR1 disable interrupt,
enable SPI, SCK idle low, data latched on
rising edge, data transferred msb
first movb 02,SPI0CR2 disable bidirectional
mode, stop SPI in wait mode movb 0,WOMS
enable Port S pull-up
20
SPI Utility Functions
  • The following operations are common in many
    applications and should be made into library
    functions to be called by many SPI applications
  • Send a character to SPI ? putcspix (x 0, 1,
    or 2)
  • Send a string to SPI ? putsspix (x 0, 1, or
    2)
  • Read a character from SPI ? getcspix (x 0, 1,
    or 2)
  • Read a string from SPI ? getsspix (x 0, 1, or
    2)

21
Function putcSPI0
putcspi0 brclr SPI0SR,SPTEF, wait until write
operation is permissible staa SPI0DR output
the character to SPI0 brclr SPI0SR,SPIF, wait
until the byte is shifted out ldaa SPI0DR
clear the SPIF flag rts
void putcspi0 (char cx) char temp
while(!(SPI0SR SPTEF)) / wait until write
is permissible / SPI0DR cx
/ output the byte to the SPI /
while(!(SPI0SR SPIF)) / wait until write
operation is complete / temp SPI0DR /
clear the SPIF flag /
22
Function putsSPI0
the string to be output is pointed to by
X putsspi0 ldaa 1,x get one byte to be output
to SPI port beq doneps0 reach the end of the
string? jsr putcspi0 call subroutine to output
the byte bra putsspi0 continue to
output doneps0 rts
void putsspi0(char ptr) while(ptr)
/ continue until all characters have been
output / putcspi0(ptr)
ptr
23
Function getcSPI0
This function reads a character from SPI0 and
returns it in accumulator A getcspi0 brclr SPI0SR
,SPTEF, wait until write operation is
permissible staa SPI0DR trigger eight clock
pulses for SPI transfer brclr SPI0SR,SPIF,
wait until a byte has been shifted
in ldaa SPI0DR return the byte in A and clear
the SPIF flag rts
char getcspi0(void) while(!(SPI0SR
SPTEF)) / wait until write is permissible /
SPI0DR 0x00 / trigger 8 SCK pulses to
shift in data / while(!(SPI0SR SPIF))
/ wait until a byte has been shifted in /
return SPI0DR / return the character /
24
Function getsSPI0
This function reads a string from the SPI and
store it in a buffer pointed to by X The number
of bytes to be read in passed in accumulator
B getsspi0 tstb check the byte
count beq donegs0 return when byte count is
zero jsr getcspi0 call subroutine to read a
byte staa 1,x save the returned byte in the
buffer decb decrement the byte
count bra getsspi0 donegs0 clr 0,x terminate
the string with a NULL character rts
void getsspi0(char ptr, char count)
while(count) / continue while byte count is
nonzero / ptr getcspi0() /
get a byte and save it in buffer /
count-- ptr 0 /
terminate the string with a NULL /
25
The HC595 Shift Register
  • The HC595 consists of an 8-bit shift register and
    a D-type latch with three-state parallel output.
  • The shift register provides parallel data to the
    latch.
  • The maximum data shift rate is 100 MHz (Philips
    part).

26
Signal Pins of the HC595
  • DS serial data input
  • SC shift clock. A low-to-high transition on this
    pin causes the data at the serial input pin to be
    shifted into the 8-bit shift register.
  • Reset A low on this pin resets the shift
    register portion of this device.
  • LC latch clock. A low-to-high transition on this
    pin loads the contents of the shift register into
    the output latch.
  • OE output enable. A low on this pin allows the
    data from the latches to be presented at the
    outputs.
  • QA to QH tri-state latch output
  • SQH the output of the eight stage of the shift
    register

27
Applications of the HC595 (1 of 2)
  • The HC595 is often used to add parallel ports to
    the microcontroller.
  • Both the connection methods shown in Figure 10.9
    and 10.10 can be used to add parallel ports to
    the MCU.

28
Applications of the HC595 (2 of 2)
  • Example 10.5 Describe how to use two 74HC595s to
    drive eight common cathode seven-segment displays
    assuming that the E clock frequency of the HCS12
    is 24 MHz.
  • Solution Use the circuit in figure 10.12 to
    connect two 74HC595s to the HCS12.

29
Program to display 87654321 on display 7 to 0
include c\miniide\hcs12.inc" org 1000 icnt d
s.b 1 loop count org 1500 lds 1500 set
up stack pointer bset DDRK,80 configure the
PK7 pin for output jsr openspi0 configure
SPI0 forever ldx dispTab use X as a pointer to
the table movb 8,icnt set loop count to
8 loop ldaa 1,x send the digit select byte to
the 74HC595 jsr putcspi0 " ldaa 1,x send
segment pattern to 74HC595 jsr putcspi0
" bclr PTK,BIT7 transfer data from shift
register to output bset PTK,BIT7
latch ldy 1 display the digit for one
ms jsr delayby1ms " dec icnt bne loop
if not reach digit 1, then next bra forever
start from the start of the table
30
openspi0 movb 0,SPI0BR set baud rate to 12
MHz movb 50,SPI0CR1 disable interrupt,
enable SPI, SCK idle low, latch data on
rising edge, transfer data msb first movb 02,SP
I0CR2 disable bidirectional mode, stop SPI in
wait mode movb 0,WOMS enable Port S
pull-up rts include "c\miniide\delay.asm" in
clude "c\miniide\spi0util.asm"

Each digit consists of two
bytes of data. The first byte is digit select,
the second byte is the digit pattern.

dispTab dc.b 80,7F,40,70,2
0,5F,10,5B dc.b 08,33,04,79,02,6D,01,3
0 end
31
include c\egnu091\include\hcs12.h include
c\egnu091\include\spi0util.c include
c\egnu091\include\delay.c void
openspi0(void) void main (void) unsigned
char disp_tab82 0x80,0x7F,0x40,0x70,0x
20,0x5F,0x10,0x5B,
0x08,0x33,0x04,0x79,0x02,0x6D,0x01,0x30
char i openspi0() / configure
the SPI0 module / DDRK BIT7 /
configure pin PK7 as output / while(1)
for (i 0 i putcspi0(disp_tabi0) / send out digit
select value / putcspi0(disp_tabi
1) / send out segment pattern /
PTK BIT7 / transfer values
to latches of 74HC595s / PTK
BIT7 / " /
delayby1ms(1) / display a digit for
1 ms /
32
The TC72 Digital Thermometer
  • 10-bit resolution and SPI interface
  • Pin assignment and block diagram shown in Figure
    10.13.
  • Capable of reading temperature from -55oC to
    125oC.
  • Can be used in continuous temperature conversion
    or one-shot conversion mode.
  • Has internal clock generator to control the
    automatic temperature conversion sequence

33
Temperature Data Format
  • Temperature is represented by a 10-bit twos
    complement word with a resolution of 0.25oC per
    least significant bit.
  • The converter is scaled from -128oC to 127oC
    with 0oC represented as 0x0000.
  • The temperature value is stored in two 8-bit
    registers.
  • Whenever the most significant bit is 1, the
    temperature is negative.
  • A sample of temperature reading is shown.

34
TC72s Serial Interface
  • The CE input to the TC72 must be asserted (high)
    to enable SPI transfer.
  • Data can be shifted on the rising edge or the
    falling edge depending on the idle polarity of
    the SCK source.
  • Data transfer to and from the TC72 consists of
    one address byte followed by one or multiple data
    (2 to 4) bytes.
  • The TC72 registers and their addresses are shown
    in Table 10.4.
  • The most significant bit of the address byte
    determines whether a read (A7 0) or a write (A7
    1) operation will occur.
  • A multiple byte read operation will start from
    high address toward lower addresses.
  • The user can send in the temperature result high
    byte address and read the temperature result high
    byte, low byte, and the control registers.

35
Procedure for Reading Temperature (1 of 2)
  • Step 1
  • Pull the CE pin high to enable SPI transfer.
  • Step 2
  • Send the temperature result high byte read
    address (0x02) to the TC72. Wait until the SPI
    transfer is complete.
  • Step 3
  • Read the temperature result high byte. The user
    needs to write a dummy byte into the SPI data
    register to trigger eight clock pulses.
  • Step 4
  • Read the temperature result low byte. Again, the
    user needs to write a dummy byte into the SPI
    data register to trigger eight clock pulses.
  • Step 5
  • Pull CE pin to low so that a new transfer can be
    started.
  • Single-byte read and multiple-byte read timing
    diagrams are shown in Figures 10.15b and 10.15c.

36
Procedure for Reading Temperature (2 of 2)
37
Control Register
  • The control register is used to select the
    shutdown, continuous, or one-shot conversion
    operating mode.
  • The temperature conversion mode selection logic
    is shown in Table 10.5.
  • At power up, the SHDN bit is 1. Thus the TC72 is
    in the shutdown mode.
  • If the SHDN bit is 0, the TC72 will perform a
    temperature conversion approximately every 150
    ms.
  • A temperature conversion will be initiated by a
    write operation into the control register to
    select the continuous mode or one-shot mode.
  • A typical circuit connection between the TC72 and
    the HCS12 is shown in Figure 10.16.

38
  • Example 10.6 Write a C program to read the
    temperature every 200 ms. Convert the temperature
    to a string so that it can be displayed in an
    appropriate output device. A pointer to hold the
    string will be passed to this function. The bus
    clock is 24 MHz.

39
include c\egnu091\include\hcs12.h include
c\egnu091\include\spi0util.c include
c\egnu091\include\delay.c include
c\egnu091\include\convert.c void read_temp
(char ptr) void openspi0(void) char
buf10 void main (void) DDRM BIT1 /
configure the PM1 pin for output / openspi0()
/ configure SPI0 module / read_temp(buf0)
void openspi0(void) SPI0BR 0x10
/ set baud rate to 6 MHz / SPI0CR1
0x50 / enable SPI0 to master mode, select
rising edge to shift data in and out /
SPI0CR2 0x02 / select normal mode and
stop SPI in wait mode / WOMS 0x00
/ enable Port S pull-up /
40
void read_temp (char ptr) char hi_byte,
lo_byte, temp, bptr unsigned int result bptr
ptr PTM BIT1 / enable TC72 data
transfer / putcspi0(0x80) / send
out TC72 control register write address /
putcspi0(0x11) / perform one shot
conversion / PTM BIT1 / disable TC72
data transfer / delayby100ms(2) / wait until
temperature conversion is complete / PTM
BIT1 / enable TC72 data transfer
/ putcspi0(0x02) / send MSB temperature read
address / hi_byte getcspi0() / read the
temperature high byte / lo_byte getcspi0()
/ save temperature low byte and clear SPIF
/ PTM BIT1 / disable TC72 data transfer
/ lo_byte 0xC0 / make sure the lower 6
bits are 0s / result (int) hi_byte 256
(int) lo_byte if (hi_byte 0x80) /
temperature is negative / result result
1 / take the two' complement of result
/ result 6
41
temp result 0x0003 / place the lowest
two bits in temp / result 2 / get rid
of fractional part / ptr 0x2D / store
the minus sign / int2alpha(result,
ptr) else / temperature is positive
/ result 6 temp result 0x0003 /
save fractional part / result 2 / get
rid of fractional part / int2alpha(result,
ptr) / convert to ASCII string
/ while(bptr) / search the end of the
string / bptr switch (temp) / add
fractional digits to the temperature / case
0 break case 1 / fractional part is .25
/ bptr 0x2E / add decimal point
/ bptr 0x32 bptr 0x35 bptr
'\0' break
42
case 2 / fractional part is .5 / bptr
0x2E / add decimal point / bptr
0x35 bptr '\0' break case 3 /
fractional part is .75 / bptr 0x2E /
add decimal point / bptr
0x37 bptr 0x35 bptr
'\0' break default break
43
The D/A Converter TLV5616
  • The TLV5616 is a 12-bit voltage output
    digital-to-analog converter (DAC) with SPI
    interface.
  • The TLV5616 has an output settling time of 3 ms
    in fast mode and 9 ms in slow mode.
  • A D/A conversion is started by writing a 16-bit
    serial string that contains 4 control bits and 12
    data bits to the TLV5616.
  • TLV5616 can operate from 2.7V to 5.5V.

44
TLV5616 Signal Pins
  • AGND analog ground
  • CS chip select (active low)
  • DIN serial data input
  • FS frame sync
  • OUT DAC analog output
  • REFIN reference analog input voltage
  • SCLK serial clock input
  • VDD positive power supply

45
Date Format
  • - A 16-bit frame with 4 control bits and 12 data
    bits.

46
TLV5616 Output Voltage
  • The output voltage is given by the following
    expression
  • VOUT 2 ? REF ? code ? 2n
  • The reference voltage input cannot be higher than
    VDD/2.

47
Data Shifting Timing
  • The FS pulse must be generated before data
    shifting can start.
  • The highest data shift rate is 20 MHz.

48
CS and FS Trigger Sequence
  • Pull FS to high.
  • Pull CS to low.
  • Pull FS to low.
  • Send out control and data bits using the SPI
    transfer.
  • Wait until all 16 bits have been shifted out
    pull FS to high.
  • Pull CS to high.

49
Circuit Connection between the TLV5616 and HCS12
50
  • Example 10.9 Write a program to generate a
    waveform that is a repetition of the
  • waveform shown in Figure 10.21 using the circuit
    shown in Figure 10.20.
  • The values to be sent to the TLV5616 to generate
    0V, 1V, 2V, and 3V outputs are
  • val(0) 0
  • val(1) 212/4 1024
  • val(2) 2 ? 212/4 2048
  • val(3) 3 ? 212/4 3072
  • The 16-bit values (in fast mode) to be written
    to the TLV5616 for this four voltages are
  • as follows
  • code (0) 4000
  • code (1) 4400
  • code (2) 4800
  • code (3) 4C00

51
include "c\miniide\hcs12.inc" PM7 equ BIT7 PM6
equ BIT6 prolog macro bset PTM,PM7 pull FS to
high bclr PTM,PM6 pull CS to
low bclr PTM,PM7 pull FS to low endm epilog ma
cro bset PTM,PM7 pull FS to high bset PTM,PM6
pull CS to high endm org 1500 lds 1500
set up the stack pointer bset DDRM,C0
configure the PM6 and PM7 pins for
output jsr openspi0 configure SPI0
properly forever ldx D2ATab Use X to point to
the table ldab 8 entry count set to
8 iloop prolog activate an FS pulse and pull
CS to low ldaa 1,x output 0V from OUT pin
52
jsr putcspi0 " ldaa 1,x " jsr putcspi0 "
epilog pull PM7 and PM6 to high ldy 1
wait for 1 ms jsr delayby1ms " dbne b,iloop
reach the end of the table? bra forever yes,
start from the beginning D2ATab dc.b 40,00,44,
00,48,00,44,00 dc.b 48,00,44,00,48,00,
4C,00 openspi0 movb 0,SPI0BR set baud rate to
12 MHz movb 54,SPI0CR1 movb 02,SPI0CR2 movb
0,WOMS enable Port S pull-up rts include
"c\miniide\delay.asm" include
"c\miniide\spi0util.asm" end
53
Matrix LED Displays
  • Many organizations have the need to display
    important information at the entrance or some
    corners of their buildings.
  • The information to be displayed can be rotated.
  • Common matrix LED displays format are 5 ? 7, 5 ?
    8, and 8 ? 8.
  • One can find color matrix LEDs with red, green,
    and red color.
  • Matrix LED displays can be organized as
    cathode-row or anode-row.
  • All LEDs in a cathode-row matrix LED display have
    a common cathode whereas those in anode-row
    matrix LED display have a common anode.

54
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55
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56
The Driving Method of Matrix LED Displays
  • Two parallel ports are needed to drive the matrix
    display.
  • One port drives the column whereas the other port
    drives the rows.
  • One needs to scan the matrix LED displays one row
    at a time, from top to bottom.
  • For multiple matrix LED displays in the
    application, time-multiplexing technique needs to
    be used.
  • Dedicated driver chips such as MAX6952 (SPI
    interface) and MAX6953 (I2C interface) are
    available for cathode-row matrix LED displays to
    simplify the interfacing.

57
The MAX6952 Matrix Display Driver
  • Designed to drive cathode-row matrix displays
    with 5 ? 7 organization
  • Can operate with power supply from 2.7 V to 5.5 V
  • Can drive four monocolor or two bicolor
    cathode-row matrix displays
  • Has built-in 104-character Arial font and 24 user
    definable characters
  • Allows automatic blinking control for each
    segment and provides 16-step digital brightness
    control
  • Pin functions shown in Table 10.7
  • Pin connections illustrated in Table 10.8 and 10.9

58
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59
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60
One MAX6952 Drives Four Matrix Displays
61
Concatenation of Multiple MAX6952s
  • Multiple MAX6952s can be concatenated to drive
    more than four matrix displays.

62
MAX6952 Block Diagram
63
Procedure for Writing the MAX6952
  • Step 1
  • Pull the CLK signal to low.
  • Step 2
  • Pull the CS signal to low to enable the internal
    16-bit shift register.
  • Step 3
  • Shift in 16 bits of data from the DIN pin with
    the most significant bit first. The most
    significant bit (D15) must be low for a write
    operation.
  • Step 4
  • Pull the CS signal to high.
  • Step 5
  • Pull the CLK to low.

64
Procedure for Reading the MAX6952 Register
  • Step 1
  • Pull the CLK signal to low.
  • Step 2
  • Pull the CS signal to low to enable SPI transfer.
  • Step 3
  • Clock 16 bits into the DIN pin with bit 15 first.
    Bit 15 must be a 1. Bits 14 to 8 contain the
    address of the register to be read. Bits 7 to 0
    contain dummy data.
  • Step 4
  • Pull the CS signal to high. Bits 7 to of the
    shift register will be loaded with the data in
    the register addressed by bits 15 through 8.
  • Step 5
  • Pull CLK to low.
  • Step 6
  • Issue another read command and examine the bit
    stream at the DOUT pin. The second 8 bits are the
    contents of the register addressed by bits 14 to
    8 in Step 3.

65
MAX6952 Register Map
66
Digit Registers (1 of 2)
  • The MAX6952 uses eight digit registers to store
    the characters that the user wishes to display on
    the four 5 ? 7 digits.
  • These digit registers are placed in two planes
    (P0 and P1) with each plane having 4 bytes.
  • Each LED digit is represented by 2 bytes of
    memory, one byte in plane P0 and the other in
    plane P1.
  • A digit data can be updated in P0, or P1, or both
    at the same time as shown in Table 10.10.
  • If the blink function is disabled, then the digit
    register data in plane P0 is used to multiplex
    the display.
  • If the blink function is enabled, then the digit
    register data in both plane P0 and P1 are
    alternately used to multiplex the display.
  • Blinking is achieved by multiplexing the LED
    display using data planes P0 and P1 on alternate
    phases of the blink clock. The multiplexing
    pattern in shown in Table 10.11.

67
Digit Registers (2 of 2)
  • The data in the digit registers does not control
    the digit segments directly.
  • The register data is used to address a character
    generator, which stores the data of a
    128-character font.
  • The lower 7 bits of he display data select the
    character font.
  • The bit 7 of the register data selects whether
    the font data is used directly (D7 0) or
    whether the font is inverted (D7 1).

68
Configuration Register
  • The configuration register is used to enter and
    exit shutdown, select the blink rate, enable and
    disable the blink function, clear the digit data,
    and reset the blink timing.

69
Intensity Registers
  • Display brightness is controlled by four
    pulse-width modulators, one for each display
    digit.
  • The upper four bits of the Intensity10 register
    control the intensity of the matrix display 1,
    whereas the lower four bits of the same register
    control the brightness of the display 0.
  • Matrix display digits 3 and 2 are controlled by
    the upper four bits and lower four bits of the
    Intensity32 register, respectively.
  • The modulator scales the average segment current
    in 16 steps from a maximum of 15/16 down to 1/16
    of the peak current.

70
Scan Limit Register
  • This register allows the user to choose between
    displaying two or four matrix displays.
  • The multiplexing scheme drives digits 0 and 1 at
    the same time, then digits 2 and 3 at the same
    time.

71
Scan Test Register
  • This register switches the drivers between two
    modes normal and test.
  • Display test mode turns on all LEDs by
    overriding, but not altering all control and
    digit registers.
  • In display test mode, eight digits are scanned
    and the duty cycle is 7/16 (half power).

72
Character Generator Font Mapping
  • The character generator comprises 104 characters
    in ROM, and 24 user-definable characters.
  • The lower 7 bits of the digit register select the
    character fonts.
  • The character map follows the Arial font for 96
    characters in the range from 0101000 to
    1111111.
  • The first 32 characters map the 24 user-defined
    positions (RAM00 to RAM23), plus eight extra
    common characters in ROM.
  • When the msb is 0 the device will display the
    font normally. Otherwise, the chip will display
    the font inversely.

73
User-Defined Font Register
  • The 24 user-definable characters are represented
    by 120 entries of 7-bit data, five entries per
    character in the SRAM.
  • The 120 user definable font data are written and
    read through a single register at the address
    0x05.
  • An auto-incrementing font address pointer
    indirectly accesses the font data.
  • The font data is written to and read from the
    MAX6952 indirectly, using the font address
    pointer.
  • To define user fonts, the user first needs to set
    the font address pointer. This is done by
    placing the address in the font address pointer
    register and set the bit 7 to 1. After this, one
    can write the font data to the lower 7 bits and
    clear the bit 7.
  • The font address pointer autoincrements after a
    valid access to the user-defined font data.
  • The memory mapping of user-defined font register
    0x05 is detailed in Table 10.12. The behavior of
    the font pointer address is illustrated in Table
    10.13.
  • To display the user-defined fonts, one must send
    in the RAM address from 0x00 to 0x17,
    corresponding to the font address pointer value
    that is 5 ? RAM address.

74
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75
Blinking Operation
  • The blinking operation makes the LED drivers flip
    between displaying the digit register data in
    planes P0 and P1.
  • If the digit register data for any digit is
    different in two planes, then that digit appears
    to flip between two characters.
  • To make a character to appear to blink on and
    off, write the character to one plane and use the
    blank character for the other plane.
  • Blinking is enabled by setting the E bit of the
    configuration register.
  • The blink speed can be programmed to be fast or
    slow and is determined by the frequency of the
    multiplex clock, OSC, and by setting the B bit of
    the configuration register.

76
Choosing Values for RSET and CSET
  • The MAX6952 uses an RC oscillator to generate
    clock signals for display multiplexing.
  • The recommended RSET and CSET values are 53.6K?
    and 26 pF, respectively.
  • The recommended values for RSET and CSET will set
    the slow and fast blinking frequencies to 0.5 Hz
    and 1 Hz.
  • The recommended values for RSET and CSET will set
    the peak current to 40 mA.

77
The Circuit that Daisy-Chains Two MAX6952 (1 of 2)
  • Example 10.10 Connect eight matrix displays to
    these MAX6952 driver chips. Assume that the E
    clock frequency is 24 MHz. Write a program to
    configure the SPI function to shift data at 12
    MHz and display the string MSU ECET.

78
The Circuit that Daisy-Chains Two MAX6952 (2 of 2)
  • Solution
  • The SPI0 module should be configured with the
    following setting
  • 12 MHz baud rate
  • Master mode with interrupts disabled
  • Shift data on the rising edge with clock idle low
  • Shift data out most significant bit first
  • Disable mode fault
  • Stop SPI0 in wait mode
  • The setting of two MAX6952s are as follows
  • Intensity10 registers
  • Set to maximum intensity
  • Send the values 0x01, 0xFF, 0x01, and 0xFF to
    these two registers.
  • Intensity32 registers
  • Set to maximum intensity
  • Send the values 0x02, 0xFF, 0x02, and 0xFF to
    these two registers
  • Scan limit registers
  • Drive four monocolor matrix displays
  • Send the values 0x03, 0x01, 0x03, and 0x01 to
    these two registers

79
Configuration Registers
  • Select P1 blink phase
  • Not to clear digit data on both plane P1 and P0
  • Reset blink counter on the rising edge of CS
  • Disable blink function
  • Select slow blinking (doesnt matter)
  • Select normal mode
  • Send the values 0x04, 0x11, 0x04, and 0x11 to
    these two registers

80
Display Test Registers
  • Disable test.
  • Send the values 0x07, 0x00, 0x07, and 0x00 to
    these two registers.

81
Digit 0 Registers (Rightmost Digit) Plane P0
  • Display space character and letter T on he
    display 0 of the first and second MAX6952.
  • Send the values 0x20, 0x54, 0x20, and 0x20 to
    these two registers.

82
Digit 1 registers (second rightmost digit) Plane
P0
  • Display letter U and E on the display 1 of the
    1st and 2nd MAX6952.
  • Send the values 0x21, 0x45, 0x21, and 0x55 to
    these two registers.


83
Digit 2 Registers (Second Leftmost Digit) Plane 0
  • Display letters S and C on the display 2 of the
    1st and 2nd MAX6952.
  • Send the values 0x22, 0x43, 0x22, and 0x53 to
    these registers.

84
Digit 3 Registers (Leftmost Digit) Plane 0
  • Display letters M and E on the display 3 of the
    1st and 2nd MAX6952.
  • Send the values 0x23, 0x45, 0x23, and 0x4D to
    these registers.
  • The program that perform the desired
    configuration is as follows

include c\egnu091\include\hcs12.h include
c\egnu091\include\spi0util.c void
sendtomax(char x1, char x2, char x3, char
x4) void openspi0(void) void main
(void) openspi0() DDRM BIT5 // configure
PM5 pin for output sendtomax(0x01, 0xFF, 0x01,
0xFF) // set intensity for digits 0
1 sendtomax(0x02, 0xFF, 0x02, 0xFF) // set
intensity for digits 2 3 sendtomax(0x03, 0x01,
0x03, 0x01) // set scan limit to drive 4
digits sendtomax(0x04, 0x11, 0x04, 0x11)
// set configuration register
sendtomax(0x07, 0x00, 0x07, 0x00) // disable
test
85
sendtomax(0x20, 0x54, 0x20, 0x20) // value for
digit 0 sendtomax(0x21, 0x45, 0x21, 0x55) //
value for digit 1 sendtomax(0x22, 0x43, 0x22,
0x53) // value for digit 2 sendtomax(0x23,
0x45, 0x23, 0x4D) // value for digit 3 void
sendtomax (char c1, char c2, char c3, char
c4) char temp PTM BIT5 / enable SPI
transfer to MAX6952 / putcspi0(c1) / send c1
to MAX6952 / putcspi0(c2) / send
c2 to MAX6952 / putcspi0(c3) / send c3
to MAX6952 / putcspi0(c4) / send c4 to
MAX6952 / PTM BIT5 / load data from shift
register to latch / void openspi0(void)
SPI0BR 0x00 / set baud rate to 12 MHz /
SPI0CR1 0x50 / disable interrupt, set
master mode, shift data on
rising edge, clock idle low /
SPI0CR2 0x02 / disable mode fault, disable
SPI in wait mode / WOMS 0 /
enable Port S pull-up /
86
  • Example 10.11 Modify the previous example to
    blink the display at a slow rate.
  • Solution The setting of the configuration needs
    to be changed and we need to send the space
    character (0x20) to the plane P1. Send the values
    0x04, 0x19, 0x03, and 0x19 to the configuration
    registers.

void main (void) openspi0() DDRM BIT5
// configure PM5 pin for output sendtomax(0x01,
0xFF, 0x01, 0xFF) sendtomax(0x02, 0xFF, 0x02,
0xFF) sendtomax(0x03, 0x01, 0x03,
0x01) sendtomax(0x04, 0x19, 0x04, 0x19) //
configuration register, blink at phase
P1 sendtomax(0x07, 0x00, 0x07, 0x00) //
disable test sendtomax(0x20, 0x54, 0x20, 0x20)
// value for digit 0 on plane P0 sendtomax(0x21,
0x45, 0x21, 0x55) // value for digit
1 sendtomax(0x22, 0x43, 0x22, 0x53) // value
for digit 2 sendtomax(0x23, 0x45, 0x23, 0x4D)
// value for digit 3 sendtomax(0x40, 0x20,
0x40, 0x20) // value for digit 0 on plane P1
(space) sendtomax(0x41, 0x20, 0x41, 0x20) //
value for digit 1 sendtomax(0x42, 0x20,
0x42, 0x20) // value for digit
2 sendtomax(0x43, 0x20, 0x43, 0x20) // value
for digit 3
87
  • Example 10.12 For the circuit shown in Figure
    10.30, write a program to display the following
    message and shift the information from
    right-to-left every second and enable blinking
  • 083040 Wednesday, 72oF, humidity 60
  • Solution One possible solution is as follows
  • Use the plane P0 to shift the message once every
    half a second.
  • Use the message in plane P0 to multiplex the
    displays in half a second.
  • Use the message sent to the plane P1 to multiplex
    the displays in the next half of a second.
  • Display space characters in plane P1 only to
    create blinking effect.
  • Use a delay function to control the shifting of
    the message.

include c\egnu091\include\hcs12.h include
c\egnu091\include\spi0util.c include
c\egnu091\include\delay.c void send2max (char
x1, char x2, char x3, char x4) void openspi0
(void) char msgP041 "083040 Wednesday,
72oF, humidity 60 "
88
void main (void) char i1, i2, i3, i4 char
j1, j2, j3, j4 char k openspi0() DDRM
BIT5 // configure PM5 pin for
output send2max(0x01, 0xFF, 0x01,
0xFF) send2max(0x02, 0xFF, 0x02,
0xFF) send2max(0x03, 0x01, 0x03,
0x01) send2max(0x04, 0x1D, 0x04, 0x1D) //
configuration register send2max(0x40, 0x20,
0x40, 0x20) // send space character to plane
P1 send2max(0x41, 0x20, 0x41, 0x20) send2max(0x
42, 0x20, 0x42, 0x20) send2max(0x43, 0x20,
0x43, 0x20) k 0 while (1) i1 k i2
(k1)40 i3 (k2)40 i4 (k3)40
89
j1 (k4)40 j2 (k5)40 j3
(k6)40 j4 (k7)40 sendtomax(0x20,
msgP0i1, 0x20, msgP0j1) sendtomax(0x21,
msgP0i2, 0x21, msgP0j2) sendtomax(0x22,
msgP0i3, 0x22, msgP0j3) sendtomax(0x23,
msgP0i4, 0x23, msgP0j4) delayby100ms(10)
/ wait for 1 s / k (k1)40
void sendtomax (char c1, char c2, char c3, char
c4) PTM BIT5 / enable SPI transfer to
MAX6952 / putcspi0(c1) / send c1 to MAX6952
/ putcspi0(c2) / send c2 to
MAX6952 / putcspi0(c3) / send c3 to
MAX6952 / putcspi0(c4) / send c4 to
MAX6952 / PTM BIT5 / load data from shift
register to latch /
90
  • Example 10.13 Write a program to define fonts for
    three special characters as shown below. Store
    these three special characters font at locations
    from 0x00 to 0x0E of the MAX6952.

91
include c\egnu091\include\hcs12.h include
c\egnu091\include\spi0util.c char fonts 15
0x70,0x40,0x7F,0x40,0x70,0x48,0x38,0x0F,0x38,0x48
,0x49, 0x49,0x7F,0x49,0x49 void
send_font (char xc) void openspi0 (void) void
main (void) char i DDRM BIT5 /
configure PM5 pin for output / openspi0() /
configure SPI module properly / send_font(0x80)
/ set font address pointer address to 0x00
/ for (i 0 i void send_font(char xx) PTM BIT5 /
enable SPI transfer / putcspi0(0x05) /
specify font address pointer / putcspi0(xx)
/ send a font value / PTM BIT5 / load
data in shift register to destination /
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void openspi0(void) SPI0BR 0x00 /
set baud rate to 12 MHz / SPI0CR1 0x50
/ disable interrupt, set master mode, shift
data on rising edge, clock
idle low / SPI0CR2 0x02 / disable
mode fault, disable SPI in wait mode /
WOMS 0 / enable Port S pull-up
/ The statements to display those three
Chinese characters followed by letters A, B, C,
D, and E from left to right on the matrix LED
displays shown in Figure 10.30 are as follows
sendtomax(0x20, 0x42, 0x20, 0x00) // 0x00 is
the address of the first character
font sendtomax(0x21, 0x43, 0x21, 0x01) // 0x01
is the address of the second character
font sendtomax(0x22, 0x44, 0x22, 0x02) // 0x02
is the address of the third character
font sendtomax(0x23, 0x45, 0x23, 0x41)
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