Instruction set of TMS320C54XX PDSP

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INSTRUCTION SET OF TMS320C54XX PDSPINSTRUCTION
SETByG SUDHAKIRANsudhakiran.495_at_gmail.com
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TYPE OF INSTRUCTION SET

• TMS320C54XX assembly language instructions can
  be classified into the following categories based
  on the function
• Load and store
• Arithmetic
• Logical
• Program-Control

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TERMINOLOGY

• Smem single memory operand (direct/indirect)
• Xmem, Ymem dual memory operand (indirect)
• Src source accumulator
• Dst destination accumulator

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LOAD AND STORE INSTRUNCTION SET

• Load instruction loads the accumulator with a
  data-memory value/ an immediate value.
• Supports different SHIFT quantities.
  accumulator-to-accumulator moves
• Eg
• LD Smem, dst
• LD Smem,SHIFT,dst load accumulator with shift
• LD K, dst

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Cont.

• Load TREG/DP/ASM/ARP loads a value into
  TREG/Status registers (DP,ASM ARP).
• LD Smem, T
• LD Smem, SP
• LD k9, DP
• LD k5, ASM
• LD k3, ARP
• LD Smem, ASM
• Load memory value in accumulator high with
  rounding (LDR)
• LDR Smem, dst

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Cont

• LDM load ACC from a MMR
• Eg LDM MMR, dst
• LDU load ACC with unsigned memory value
• Eg LDU Smem, dst
• ST//LD, LD//MAC
• ST store TREG, TRN or immediate value into
  memory
• Eg
• ST T, Smem
• ST TRN,Smem
• ST lk, Smem

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Cont

• STH store ACC high into memory
• Eg STH src, Smem
• STH src, SHIFT, Xmem
• STL store ACC low into memory
• Eg STL src, Smem
• STL src, SHIFT, Xmem
• STLM store ACC low into MMR
• Eg STLM src, MMR
• STM store immediate value into MMR
• Eg STM lk, MMR
• Conditional store
• CMPS compare select max and store
• STRCD store TREG conditionally

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Cont

• Parallel store and add/subtract
• ST//ADD store ACC with parallel add
• ST//SUB parallel store and subtract
• Parallel store and multiply
• ST//MPY parallel store and multiply
• ST//MAC parallel store and multiply ACC
• ST//MACR parallel store and multiply ACC with
  rounding

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ARITHMETIC INSTRUCTION SET

• ADD instructions
• Add 16-bit value to
• The contents of a single data-memory
• The contents of dual data-memory operand
• A 16-bit long-immediate operand
• Shifted value in the source ACC
• Destination specified implies stores into
  destination otherwise into ACC

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Cont

• ADD Smem, src add content in Smem to source ACC
• Eg ADD AR1,A
• ADD Xmem, SHIFT, src add content of Xmem to
  source by shifting.
• Eg ADD AR2, SHIFT, A
• SHIFT 16, 12, 9, 5, (left), -(right)
• ADD lk, SHIFT, src add the immediate value to
  source by shift the data specified by SHIFT
• Eg ADD 2345H, 7,B
• ADDC Smem, src add to source with carry
• Eg ADDC AR2(15H),A 15H is added to the
  content of AR2 first. Then the content of
  location pointed by AR2 is added to A register
  with carry
• ADDS Smem, src add to source with
  sign-Extension suppressed
• Eg ADDS AR2-, B
• ADDM lk,Smem add long-immediate value to memory
• Eg ADDM 123BH,AR4

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SUBTRACT INSTRUCTION

• It Subtracts a 16-bit value from the contents of
  selected ACC/Xmem
• The 16-bit value to be subtracted is one of the
  following
• The contents of a single data-memory
• The contents of dual data-memory operand
• A 16-bit long-immediate operand
• Shifted value in the source ACC
• Destination specified implies stores into
  destination otherwise into ACC

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Cont

• SUB Smem, src content of Smem subtracted from
  source ACC
• Eg SUB AR1,A
• SUB Xmem, SHIFT, src content of Xmem
  subtracted from source by shifting.
• Eg SUB AR2, SHIFT, A
• SHIFT 16, 12, 9, 5, (left), -(right)
• SUB lk, SHIFT, src the immediate value
  subtacted from source by shift the data specified
  by SHIFT
• Eg SUB 2345H, 7, A
• SUB 2345H, 7, A, B
• SUBB Smem, src subtract from ACC with borrow
• Eg SUBB AR1, B the content of AR2 and the
  logical inverse of the carry bit are subtracted
  from the ACC without sign-extension. The content
  of AR1is incremented after this expresion
• SUBS Smem, src subtract from acc with
  sign-Extension suppressed
• Eg SUBS AR2-, B
• SUBC subtract conditionally used for division
  also
• Eg ADDM 123BH,AR4

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MULTIPLY INSTRUCTION

• Multiply (MPY) multiplies the contents of TREG
  or a data-memory value by a data-memory value or
  an immediate value.
• TREG is loaded with the Smem/Xmem value in the
  read phase of the first/second execution cycle
• Eg MPY 13,B multiplies the current content of
  TREG by the contents of the data-memory location
  13 in the current data page. The result is placed
  in the ACC B.
• MPY Xmem, Ymem, dst
• MPY Smem, lk, dst
• MPY lk, dst
• MPYA multiply by accumulator A it multiplies
  the high parts(bits 32-16) of A by a single
  data-memory operand or by TREG (used in read
  phase).
• Eg MPYA Smem
• MPYA dst

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• Cont
• MAC multiply and accumulate instruction
• Improvement of MPY
• Multiplies a data-memory value by another
  data-memory and adds the product to src
• TREG is loaded with Xmem value
• Eg MAC Xmem, Ymem, A
• MAC AR5, 1234H, A
• Multiplies the contents of data-memory locations
  pointed by AR5 by the constant 1234H and adds the
  product to the contents of the ACC. During the
  execution, TREG is loaded the content of the
  data-memory location pointed by AR5. AR5 is then
  incremented by 1.
• MAS multiply and subtract instruction
• Eg MAS Xmem, Ymem, src, dst
• MAS AR3-, AR4, B, A
• B-(AR3AR4) stored into A, TREG AR3
• MAS is used for computing butterflies in FFT
  implementationMASA multiply by ACC A and
  subtract

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Cont..
MACD multiply, accumulate and delay
instruction Similar to MAC Copies the contents of
the current data-memory address to the next
higher data-memory address Two operands require
to be a single data-memory value and a
program-memory value Used to implement FIR
filters Eg MACD Smem, pmad, src (Data-memory
program-memory) source stored into ACC DADD
double precision/dual mode add to ACC DSUB
double precision/dual 16-bit subtract from ACC
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Cont.

• Application specific instruction
• EXP ACC exponent
• Computes the exponent value, which is a signed
  2s-complement value in the -8 to 31 range and
  results stored in TREG
• Exponent is computed by calculating the number of
  leading bits in the source ACC and subtracting 8
  from this value
• Number of leading bits is equivalent to the
  number of left shifts needed to eliminate the
  significant bits from the 40-bit source ACC with
  the exception of the sign bit
• Source ACC isnt modified after this execution
• The result of subtracting 8 from the number of
  leading bits produces a negative exponent for ACC
  values that have significant bits in the guard
  bits
• NORM normalization Eg NORM src ,dst
• POLY polynomial evaluation Eg POLY Smem
• SAT saturate ACC Eg SAT src
• FIRS symmetrical FIR filter Eg FIRS Xmem, Ymem,
  pmad

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LOGICAL INSTRUCTION
AND INSTRUCTIONS AND And with ACC Syntax AND
Smem, src AND lk, 16, src,dst AND
lk,SHIFT, src,dst AND src,SHIFT,dst ANDM
And memory with long immediate Syntax ANDM
lk, Smem
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Cont.
OR INSTRUCTION OR OR with ACC Syntax OR Smem,
src OR lk, 16, src,dst OR lk,SHIFT,
src,dst OR src,SHIFT,dst ORM OR memory
with 16-bit constant Syntax ORM lk, Smem
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Cont.
XOR INSTRUCTION XOR Exclusive-OR with
ACC Syntax XOR Smem, src XOR lk, 16,
src,dst XOR lk,SHIFT, src,dst XOR
src,SHIFT,dst XORM XOR memory with 16-bit
constant Syntax XORM lk, Smem CMPL find 1s
complement of ACC Eg CMPL src,dst NEG find
2s complement of ACC Eg NEG src,dst
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Cont.
TEST INSTRUCTIONS CMPM compare memory with long
immediate Eg CMPM Smem, lk CMPR compare
auxiliray register with AR0 Eg CMPR
CC,ARX BIT Test bit Eg BIT Xmem, BITC BIT
AR5, 15-12 this copies bit 12 of the location
pointed by AR5 into TC ROTATE SHIFT
INSTRUCTION ROL rotate ACC left Eg ROL
src ROLTC rotate ACC left with TC Eg ROLTC
src ROR rotate ACC right Eg ROR src SFTA
shift ACC arithmetically Eg SFTA src,
SHIFT,dst SFTC shift ACC conditionally Eg
SFTC src SFTL shift ACC logically Eg SFTL
src,SHIFT,dst
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PROGRAM CONTROL INSTRUCTIONS
BRANCH,CALL RETURN INSTRUCTIONs Syntax B(C)
branch (un)conditionally Syn B pmad (BC
cond,cond,cond) BACC branch to location
specified by ACC Syn BACC src BANZ branch on
auxiliary register not zero Syn BANZ pmad,
Sind CALA call subroutine at location specified
by ACC Syn CALA src CALL call
unconditionally Syn CALL pmad CC call
conditionally Syn CC pmad, cond,cond,cond RC
return conditionally Syn RC cond,cond,cond
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Cont.
RET return Syn RET RETE enable interrupts
and return from interrupt Syn RETE RETF
enable interrupts and fast return from
interrupt Syn RETF STACK MANUPULATING
INSTRUCTION PSHD push data-memory value onto
stack Syn PSHD Smem PSHM push MMR onto
stack Syn PSHM MMR POPD pop top of stack to
data-memory Syn POPD Smem POPM pop top of
stack to MMR Syn POPM MMR
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Cont..
FRAME add an 8-bit short immediate signed no. to
stack pointer Syn FRAME K CONDITIONAL STORE
INSTRUCTIONS SRCCD store block repeat counter
conditionally Syn SRCCD Xmem,cond SACCD store
ACC conditionally (stores the ACC -s
ASM-16) Syn SACCD src, Xmem, cond STRCD store
TREG conditionally Syn STRCD Xmem, cond
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Cont.
REPEAT INSTRUCTION RPT repeat next
instruction Syn RPT Smem RPT
k RPT lk RPTB block repeat RPTZ
repeat next instruction and clear ACC INTERRUPT
INSTRUCTION INTR transfers program control to
the interrupt vector specified by K Syn INTR
k TRAP transfers program control to an interrupt
service routine specified by K Syn TRAP k
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Cont
IDLE idle until interrupt Forces the program
being executed to wait until an unmasked
interrupt/reset occurs Syn IDLE K Eg IDLE 1
the processor idles until a reset or unmasked
interrupt occurs IDLE 2 the processor idles
until a reset or unmasked external interrupt
occurs IDLE 3 the processor idles until a reset
or unmasked external interrupt occurs
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