Title: ECT 114 Course Experience Tradition / snaptutorial.com
1ECT 114
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ECT 114 Course Experience Tradition
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2ECT 114
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ECT 114 Course Experience Tradition
ECT 114 Week 1 iLab
1.Using QUARTUS II software, open a new Block
Diagram/Schematic file. Enter the logic gate
symbols representing the following gates. Connect
and label input and output pins. Label the inputs
as A, B, C and label the output as Z. Paste the
schematics into this iLab. (14 points) 2.Using
QUARTUS II software, open a Block
Diagram/Schematic file. Insert the logic gate
symbol for the following Boolean expressions.
Connect and label input and output pins. Paste
the schematics into this iLab. (20 points)
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ECT 114 Course Experience Tradition
ECT 114 Week 2 iLab
1. (1 point) Which is the preferred environmental
condition for handling electronic components that
are ESD sensitive? 2. (1 point) What does ESD
stand for? 3. (1 point) List three common means
for generating static electricity
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ECT 114 Course Experience Tradition
ECT 114 Week 2 Quiz
1. (TCO 1) Determine the correct Boolean
expression for the gate below 2. (TCO 1)
Determine the correct Boolean expression for the
gate below. 3. (TCO 1) Determine the correct
Boolean expression for the gate below. 4. (TCO 1)
Determine the correct Boolean expression for the
gate below. 5. (TCO 1) Determine the correct
Boolean expression for the gate below.
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ECT 114 Course Experience Tradition
ECT 114 Week 3 iLab
ECT 114 ECT/114 ECT 114 Week 3 iLab
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ECT 114 Course Experience Tradition
ECT 114 Week 4 iLab
1.Explain the operation of an encoder. (1 point)
_It is a device that converts a weighted numeric
input line to an equivalent digital code. 2.What
does it mean when an encoder is a priority
encoder? (1 point) _Logic establishes a rank
order for inputs and always accepts the higher of
multiple inputs. 3.Describe one practical
application that uses encoder. (1 point) _A TV
remote control or a 10key keypad.
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ECT 114 Course Experience Tradition
ECT 114 Week 5 Homework Quiz
1. (TCO 5) Download the datasheet fromwww.ti.com
for the 74LS151. Which device type has the lowest
typical power dissipation? (Points 1) 2. (TCO
5) View a datasheet function table for a 74151
device. Using Quartus pin names, assume the chip
is enabled and C 1, B 0, and A 0. Which
data input appears on output Y? (Points 1) 3.
(TCO 5) View a datasheet function table for a
74151 device. Which are the select input pin
names, and which is the active level of the
select input pins?(Points 1)
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ECT 114 Course Experience Tradition
ECT 114 Week 5 iLab 5
ECT 114 ECT\114 ECT 114 Week 5 iLab 5LSE
statement. (6 points)
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ECT 114 Course Experience Tradition
ECT 114 Week 5 iLab
Problems 1. efly explain the operation of a
multiplexer 2. Describe one practical application
that uses a multiplexer. 3. Briefly explain the
operation of a demultiplexer. (1 point 4.
Describe one practical application that uses a
demultiplexer. (1 point 5. Complete the following
timing diagram based on the data sheet for the
74151 multiplexer. (10 points) 6. Interpret the
datasheet for the 74138 demultiplexer and
complete the following timing diagram. (9 points)
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ECT 114 Course Experience Tradition
ECT 114 Week 5 Quiz
3. (TCO 5) View a datasheet function table for a
74151 device. Which are the select input pin
names, and which is the active level of the
select input pins? 4. (TCO 5) View a datasheet
function table for a 74151 device. Data are
applied to D4, the device is enabled, and the
select lines are set to select D4. Which output
will have an inverted version of D4? 5. (TCO 5)
View a datasheet function table for a 74151
device. The inputs to the 74151 are C 1, B 0,
A 0, D7 0, D6 0, D5 1, D4 1, D3 1, D2
1, D1 0, D0 1, and GN 0. Which is the
value of Y and why?
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ECT 114 Course Experience Tradition
ECT 114 Week 6 iLab 6
ECT 114 ECT\114 ECT 114 Week 6 iLab 6
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ECT 114 Course Experience Tradition
ECT 114 Week 6 iLab
1.Describe one practical application that uses an
adder. (2 points) ___________A computers
CPU._______________________ 2. What is a major
advantage of using twos complement subtraction?
(2 points)_______The 2s complement allows
hardware to subtract numbers by adding
them.___________ 3. Create the adder/subtractor
circuit below using a 7483. (6 points) 4. From
the circuit in problem 3, determine the proper
output signals for S and CarryOut in the area
provided in the figure below. (8 points)
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ECT 114 Course Experience Tradition
ECT 114 Week 7 iLab 7
ECT 114 ECT\114 ECT 114 Week 7 iLab 7
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ECT 114 Course Experience Tradition
ECT 114 Week 7 iLab
1.Open the Quartus II software and create a new
project calledDFlipFlop. Using the Block
Diagram/Schematic editor, create the diagram
shown below. (10 points) 2.Compile and simulate
the operation for the D flip-flop according to
the following timing diagram. (15 points) 4.Open
the Quartus II software and create a new project
calledJKFlipFlop. Using the Block
Diagram/Schematic editor, create the diagram
shown below. (10 points) 6.Zip your entire
project directory and submit the zipped file with
your iLab. (5 points)
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ECT 114 Course Experience Tradition
ECT 114 Week 7 Quiz
1. (TCO 7) Predict the correct output for Q on
the D flip-flop with the flip-flop as a rising
edge triggered device. 2. (TCO 7) Predict the
correct output for Q on the D flip-flop with the
flip-flop as a rising edge triggered device 3.
(TCO 7) Predict the correct output for Q on the D
flip-flop with the flip-flop as a falling edge
triggered device 4. (TCO 7) Examine the waveforms
below and determine where the fault is in the
flip-flop output waveform. The flip-flop is
triggered by a rising edge 5. (TCO 7) Predict the
correct output for Q on the JK flip-flop with the
flip-flop as a rising edge triggered device
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ECT 114 Course Experience Tradition
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