3D transistor

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?? ???? ???

• Subject 3D transistors
• Samrand Xezrpur
• Kamal Abubakri
• Diako Neshasteh
• Supervisor Dr Razaghi

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index

• Brief history
• Transistor basics
• Moores law
• High k
• PLANAR MOSFET
• Channel Pinch-Off
• Analysis and Design of Tri-Gate MOSFET with High
  Dielectrics Gate 3D transistors
• Characteristics of Tri-gate transistors

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Brief history

• T-R-A-N-S-I-S-T-O-R TRANsfer resiSTOR
• 1947 John Bardeen, Walter Brattain and William
  Schokley at Bell laboratories built the first
  working point contact transistor (Nobel Prize in
  Physics in 1956)
• 1925 Julius Lilienfield patents the original
  idea of field effect transistors
• 1935 Oskar Heil patents the first MOSFET
• 1963 Frank Wanlass at Fairchild describes the
  first CMOS logic gate (nMOS and pMOS)
• 1970 Processes using nMOS became dominant
• 1980 Power consumption become a major issue.
  CMOS process are widely adopted.

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Transistor basics

• The goal of a transistor is to act as a very high
  speed electrical switch.
• Ideally a transistor needs to do three things
• Allow as much current to flow when it's on
  (active current)
• Allow as little current to flow when it's off
  (leakage current)
• Switch between on and off states as quickly as
  possible (performance)

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Moores law

• In 1963 Gordon Moore predicted that the number of
  transistors on an integrated circuit doubles
  approximately every two years which is achieved
  by scaling down the transistor size.
• According to Intel, Tri-Gate was implemented
  because it would not have been possible to
  continue Moore's law at 22nm and below without a
  major transistor redesign. With Tri-Gate
  transistors, Intel claims to have extended
  Moore's law at least another two years.

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High k

• The term high-? dielectric refers to a material
  with a high dielectric constant ? (as compared to
  silicon dioxide)
• Silicon dioxide (SiO2) has been used as a gate
  oxide material for decades.
• Replacing the silicon dioxide gate dielectric
  with a high-? material allows increased gate
  capacitance without the associated leakage effects

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PLANAR MOSFET

• MOSFET

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Channel Pinch-Off
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3D transistors
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Modifications in planar transistors..
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Analysis and Design of Tri-Gate MOSFET with High
Dielectrics Gate

• In any normal transistor the drain to
  source current is defined by the equation

The drain source in transistor 3d is
proportional to ??2?? ?? ratio. Here H is
the width of the transistor and drain to
source current is given by the equation
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Gallium Arsenide
µ 8500 cm/V2
Cox 10.588 n F
L .045 µm
2H 10 µm
W 22.5 µm
H 5 µm
Suppose the threshold voltage for transistor
Vt 0.6 V and the gate to source voltage Vgs
1 V, 2 V and 3 V
planar
Tri_gate
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2?????? ???? ??????
gm 2Id Vgs-Vt
?? ?????? ?????? VDD
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Characteristics of Tri-gate transistors
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tri-GATE transistors BENEFITS

• Dramatic performance gain at low operating
  voltage , better than Bulk, PDSOI,FDSOI
• 37 performance increase at low voltage
• 50 power reduction at constant performance
• Improved switching characteristics
• Higher drive current for a given transistor
• Only 2 3 cost adder

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Reference

• Process Integration, Devices, and Structures
  (PDF).International Technology Roadmap for
  Semiconductors2006 Update.
• MICROELECTRONIC CIRCUITS 5/e
• Fundamentals-of-Microelectronics-Behzad-Razavi
• Analysis and Design of Tri-Gate MOSFET with High
  Dielectrics GateViranjay M. Srivastava, Setu P.
  Singh Department of Electronics and Communication
  Engineering,Jaypee University of Information
  Technology, Solan - 173234, India.Viranjay_at_ieee.or
  g

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