Prototyping with a bioinspired reconfigurable chip

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Prototyping with a bio-inspired reconfigurable
chip

• Yann Thoma, Eduardo Sanchez
• Logic Systems Laboratory, EPFL, Lausanne,
  Switzerland
• Daniel Roggen
• Autonomous Systems Laboratory, EPFL, Lausanne,
  Switzerland
• Carl Hetherington
• Dept. of Electronics, University of York, UK
• Juan-Manuel Moreno
• Dept. of Electronic Engineering, Technical
  University of Catalunya (UPC), Barcelona, Spain

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Outline

• What is bio-inspired hardware?
• Chip architecture
• Development tools
• Applications

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What is bio-inspired hardware?
Phylogeny (P) - Evolution
Evolutionary Computation
Ontogeny (O) - Development
Embryonics
Epigenesis (E) - Learning
Spiking NN, Immunotronics
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Bio-inspired hardware
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Hardware features for bio-inspiration
SoC with CPU, reconfigurable logic and I/O
peripherals Direct and fast CPU access to
configuration bits Documented configuration
string Hardware self-reconfiguration Support for
evolutionary algorithms in CPU instruction set
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Architecture of the chip
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POEtic microprocessor peripherals

• 32-bit RISC
• Load/store architecture
• One clock cycle per instruction

• AMBA bus for interfacing peripherals
• Hardware pseudo-random number generation
• In charge of
• Managing input/output

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Organic subsystem

• Dynamic routing array
• 6x6 routing units
• Long distance communication
• Run-time dynamic path creation

• Reconfigurable logic (molecular array)
• 12x12 molecules
• Local communication by switch-boxes
• Self-reconfiguration

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About Molecules

• Based on a 16-bit memory

• 8 operational modes

• Output Output to the routing plane
• Trigger To synchronize the routing process
• Comm one 8-bit shift register and one 8-bit LUT
• Configure To partially configure a neighbor

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Routing plane

• A 2D array of routing units
• 4-neighbors connectivity
• 2 signals in each direction
• Run-time, dynamic routing
• Routing based on identifiers
• Routing controlled by the molecules
• Fully distributed, no global control
• Possibility to connect different chips together

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Processor tools

• Meta-assembler derived from WinTim32
• Converts ASCII instructions to machine code
• Preprocessor supports Macros, Defines,
  Conditional expressions
• LCC meta-compiler
• C compiler
• No language restrictions
• Outputs binary and VHDL files for later simulation

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• CPU emulator
• Emulates POEtic CPU instructions through software
• 10-100 times faster than VHDL simulation
• Graphical display of memory, register, program
• Breakpoints, step by step execution
• Import of compiled WinTim32 files, export to VHDL
  or COE
• Plugins (DLLs) to emulate memory mapped
  peripherals (e.g. UART)

Very useful to debug the CPU VHDL!
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Design tools

• POEticMol - Molecule editor

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• Schematic editor synthesizer

• Allows creation of POEtic designs at the
  schematic level.

• Place components (counters, triggers, logic
  gates) and connect them together
• Molecule configuration automatically generated
  from schematic
• Higher-level components can be created from
  simple ones

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• Simplification decomposes complex connections
  into simple ones

• Synthesize molecules generate molecules that
  implement each component

• Routing find the shortest path between molecules
  via the switch boxes (Dijkstra's shortest path
  algorithm)

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Application Neural Networks

• Spiking neurons leaky integrate fire with
  refractory period and learning
• Rich temporal dynamics, biologically interesting
  behaviour
• Serial Implementation of POEtic neuron model
• Uses 80 molecules
• No Memories, but Input Multiplexers to connect
  with them

Torres, Eriksson, Moreno and Villa, Hardware
Optimization of a Novel Spiking Neuron Model for
the POEtic tissue, IWANN'03
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Application Gate-level Evolvable Hardware

• Artificial evolution is used to create electronic
  circuits
• No short-circuits should occur
• Reconfiguration must be fast
• POEtic brings
• Routing based on multiplexers (no short-circuits)
• On-chip processor with 32-bit parallel access to
  the configuration of the molecules
• One possible configuration of POEtic corresponds
  to the Xilinx XC6200 family used in evolvable
  hardware (not manufactured anymore)
• Experiments done with the XC6200 can be reproduced

Thoma and Sanchez, A reconfigurable chip for
evolvable hardware, GECCO04
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Application Evolving and developing circuits

• Multi-cellular circuit
• Complete genetic description of the circuit in
  each cell

• Relies on dynamic routing, local
  reconfiguration, CPU integration
• Application evolution of logic function, robot
  controllers
• Substrate for implementing fault-tolerance
• Dead cells can be disabled
• Dynamic routing connects to spare cells

Roggen, Thoma and Sanchez, An evolving and
developing cellular electronic circuit, Alife04
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Conclusion Future work

• POEtic architecture designed for bio-inspired
  hardware
• Development tools for CPU and reconfigurable
  logic available
• Dynamic routing, self-reconfiguration, CPU
  instruction set, CPU integration are key features
  for bio-inspired systems
• Future work include improving the integration
  among the tools, developing more applications
  exploiting the POEtic features, ...