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Objective

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Vessel Enhancement in Retinal Fundus Images. Miriam Leeser. Shawn Miller. Badrinath Roysam ... Extraction from Retinal Fundus Images Using Direct Exploratory ... – PowerPoint PPT presentation

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Title: Objective


1
Using Reconfigurable Hardware for
Accelerated Vessel Enhancement in Retinal Fundus
Images
  • About the Algorithm
  • What does the algorithm do?
  • Retinal vascular tracing detection of blood
    vessels in images of the retina.
  • The algorithm finds blood vessels and traces out
    their structure.
  • Where is the algorithm used?
  • Processing live video of the patient retina
    during laser retinal surgery.
  • Highlighting the vascular structure helps the
    surgeon avoid damage.
  • Why do we need to accelerate it?
  • Current implementation software on a
    general-purpose processor.
  • Images are 1024x1024 pixels, and need to be
    processed at 30 frames/sec.
  • How is the algorithm to be accelerated?
  • Template responses are calculated in hardware in
    parallel.
  • All pixels in the image are processed.
  • Host-board communications are minimized.

Direction Templates
Objective To accelerate an existing retinal
vascular tracing algorithm by implementing
computation of template responses in
reconfigurable hardware.
  • Progress
  • Completed a pipelined design including the
    on-board memory interface
  • Can process images at 30MHz, or 12 frames/sec.
  • Designed, simulated, and synthesized
  • all modules in design,
  • memory interface,
  • fully pipelined datapath.
  • Future Work
  • Optimize design to run at higher frequency to
    reach target of 30 frames/sec.
  • Connect camera directly to the FPGA board to
    process streaming data.
  • Measure speed up compared to the software
    solution.

Results
Original Image One output is the original image.
Each pixel is passed through the design unaltered.
Direction The direction template with the maximum
response is output for every pixel. The
direction is represented by a value between 0 and
15.
Response The maximum response that led to the
direction decision is also output.
  • Reconfigurable Hardware
  • The Firebird reconfigurable computing engine from
    Annapolis Micro Systems
  • 1 Xilinx VIRTEX E (XCV2000E) FPGA
  • 5 Memory banks (4 x 64-bit, 1 x 32-bit)
  • 5.4 Gbytes/sec of memory bandwidth
  • 66Mhz/64-bit PCI interface to host

More Information In proceedings Rapid
Automated Tracing and Feature Extraction from
Retinal Fundus Images Using Direct Exploratory
Algorithms A. Can, H. Shen, J.N. Turner,
H.L. Tanenbaum and B. Roysam, IEEE Transactions
on Information Technology in Biomedicine, June
99 On the web http//www.ece.neu.edu/groups/
rpl/projects/retinaltracing
This work was supported in part by CenSSIS, the
Center for Subsurface Sensing and Imaging
Systems, under the Engineering Research Centers
Program of the National Science Foundation (Award
Number EEC-9986821).
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