CoE EE 00142 Computer Organization Set 3 Multiplication and Division

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CoE - EE 00142Computer OrganizationSet 3
Multiplication and Division

• Ron Hoelzeman

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ALU Block Diagram
Normally, the accumulator has logical and
arithmetic shift capability, both left and right
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Another Symbol for ALU
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Binary Multiply
Binary
Decimal
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Simultaneous Multiplication
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Equations

• P0 X0Y0
• P1 (X0Y1) add to (X1Y0)
• use half adder
• P2 (X0Y2) add to (X1Y1) add to (X2y0) add to
  Cin
• use half adder full adder
• P3 etc.

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Simultaneous Multiplier
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Multiplication Example

• 1011 Multiplicand (11 dec)
• x 1101 Multiplier (13 dec)
• 1011 Partial products
• 0000 Note if multiplier bit is 1 copy
• 1011 multiplicand (place value)
• 1011 otherwise zero
• 10001111 Product (143 dec)
• Note need double length result

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Binary Multiplication Example
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Example Multiply Algorithm
Multiplicand 0100 4 Multiplier 0101 5 20
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Example using AU-AL Lft Shft
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Example Hardware
Multiplicand left - Multiplier right - PP
stationary
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(No Transcript)
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(No Transcript)
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(No Transcript)
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Multiplicand stationary - Multiplier right - PP
right
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Multiplicand stationary - Multiplier right - PP
right
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Example (3 x 2)
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Another Example - Right Shift
0
0
1
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Multiplying Negative Numbers

• This does not work as is
• Solution
• Convert to positive if required
• Multiply as above
• If signs were different, negate answer
• Use Booths algorithm

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Booths Algorithm

• Designed to improve speed by using fewer adds
• Works best on strings of 1s
• Example premise
• 7 8 1
• 0111 1000 0001 (3 adds vs 1 add 1 sub)
• Algorithm modified to allow for multiplication
  with negative numbers

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Multiply in MIPS
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Hardware - Software

• Some compilers replace constants with a series of
  shifts, add, and subtracts
• Particularly valuable when multiplying by a power
  of 2

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Division

• More complex than multiplication
• Negative numbers are really bad
• Based on long division

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Long Hand Division
013
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147
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037
Partial Remainders
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4
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Division of Unsigned Binary Integers
Quotient
00001101
1011
10010011
Divisor
Dividend
1011
001110
Partial Remainders
1011
001111
1011
Remainder
100
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Long Division
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Long Division
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Long Division
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Long Division
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Long Division
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Division Algorithm
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Division Algorithm
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Divide Example
15 - 01111 divided by 5 - 00101
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Long Hand Division Hardware
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Long Hand Division Hardware Algorithm
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Realistic Division Hardware
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Realistic Division Hardware Algorithm
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Divide in MIPS
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Hardware Control Aspects

• How do we create the control within the ALU
• Use examples from 0132 text

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Unsigned Binary Multiplication
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Consider Multiplier Schematic
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Execution of Example
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Binary Multiplier Block Diagram
Figure 8-6 Page 368
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Algorithmic State Machine
Figure 8-1 Page 362
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ASM Block Example
Figure 8-2 Page 363
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Binary Multiplier ASM Chart
Figure 8-7 Page 369
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Binary Multiplier Sequencing
Figure 8-8 Page 372
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Implementation Mechanisms
Algorithmic State Machine ASM
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Binary Multiplier Block Diagram
Figure 8-6 Page 368
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Control Signals
Table 8-1 Page 371
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Multiplier Control Unit
Go
LSB of Multiplier
Figure 8-9 Page 375
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Microprogrammed Control Unit
Figure 8-12 Page 379
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Example Microinstruction
Typically in ROM Each Cn bit is a control
line Nxt is next address, depending on decision
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Floating Point Operations

• Review of IEEE Floating Point
• How would we implement?
• Example flowcharts for
• Addition/Subtraction
• Multiplication
• Division

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Real Numbers

• Numbers with fractions
• Could be done in pure binary
• 1001.1010 24 20 2-1 2-3 9.625
• Fixed point
• Very limited
• Moving or floating point
• How do you show where binary point is

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Floating Point

• (/-) x 1.significand x 2(exponent-127)
• Exponent indicates position of binary point

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Normalization

• FP numbers are usually normalized
• i.e. exponent is adjusted so that leading bit
  (MSB) of mantissa is 1
• Example - Scientific notation where numbers are
  normalized to give a single digit before the
  decimal point
• e.g. 3.123 x 103
• Because it is always 1, there is no need to store
  it

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FP Ranges

• For a 32 bit number
• 8 bit exponent
• /- 2256 ? 1.5 x 1077
• Accuracy
• The effect of changing lsb of mantissa
• 23 bit mantissa 2-23 ? 1.2 x 10-7
• About 6 decimal places

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IEEE Standard 754

• Standard for floating point storage
• 32 and 64 bit standards
• 8 and 11 bit exponent respectively
• Extended formats (both mantissa and exponent) for
  intermediate results

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Floating Point Arithmetic

• Addition Subtraction
• Must align binary points
• e.g. adjust exponents
• Multiplication Division
• Add/sub unbiased exponents
• e.g. adjust exponents
• Normalize the results

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FP Addition - Subtraction
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FP Addition Algorithm
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FP Addition Hardware
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FP Arithmetic x/?

• Check for zero
• Add/subtract exponents
• Multiply/divide significands
• watch sign
• Normalize
• Round
• Double length intermediate results

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FP Multiply Flowchart
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FP Multiplication Algorithm
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FP Divide Flowchart
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End of Set 3