Versatile Frontend Chip for Capacitive Sensors

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Versatile Front-end Chip for Capacitive Sensors

• Roman Steiner

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Opening

• Application range of capacitive sensors is
  steadily growing
• Pressure, humidity and acceleration measurement.
• Common to most capacitive sensors is
• Full scale capacitance change is relative small
  compared to the large amount of stray capacitance
  inherent to the sensor.

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Outline

• Performance requirements of a customer
  application
• Features and functionality of the front end Chip
• Details of the capacitance matching circuitry

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Performance requirements

• Measurement Principle

• Customer manufactures pressure gauges for
  measurements in vacuum processes
• Resolution requirement of the conditioned sensor
  signal approaches 16 Bits

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Cross section of the diaphragm

• Full scale deflection amounts to 1.7µm

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Minimal measurable deflection

• Considering 16 Bits Resolution. 1 LSB equals 25
  pico meter diaphragm deflection
• Minimal deflection equals one fifth of the
  diameter of a Helium atom.

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Goals of the Front-End Chip

• S/N approaches 16 Bits
• Shorten factory calibration time
• Increase temperature stability
• Enhance linearity of pressure signal

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Simplified interface overview

• Cx represents the capacitance of the sensor
• The output voltage Vout is proportional to (Cx
  -Cref)
• The SPI allows to adjust gain, offset and SC
  clock division. Further more it allows to match
  Cx and Cref in 1fF steps!
• The temperature signal is used for temperature
  compensation

Front- end
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Two possible setups
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Charge balanced amplifier
10 Bits control division from 2 to 2046 in steps
of 2
11 Bits control capacitance matching. Ccomp may
be tuned from 0 to 1023 fF. Bit no. 10 defines
the matching polarity
10 Bits control gain from 1 to 220
10 Bits control offset from 0 to Vref
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Photo-micrograph of prototype chip
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Detailed view of the matching circuitry
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Matching schematic

• By reducing the charge voltage the unity
  capacitance can be increased from 1 to 100fF.
  Nevertheless emulating 1fF steps.

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Close

• I hope this presentation gave you a interesting
  overview of our current ASIC project
• Questions?