Fig 2: Readout Scheme of a Drift Chamber

1
Design of an octal Time-to-Digital Converter for
a Drift Chamber
N.K.Mondal and B.Satyanarayana Tata Institute of
Fundamental Research, Homi Bhabha Road, Colaba,
Mumbai - 400 005, Contact bsn_at_tifr.res.in
1. Introduction
3. Specifications of TDC
One of the basic requirements of experimental
particle physics is the determination of particle
trajectories. In a Drift Chamber, the spatial
information could be obtained by measuring the
drift time of the electrons coming from an
ionizing event. Assuming a highly desirable
constant electric field and hence a constant
drift velocity, the distance from the sensing
wire to the origin of the electrons is obtained
by measuring the interval between the arrival
time of the particle and the time at which the
pulse appears at the anode. The arrival of a
particle is usually indicated by an external
trigger.

• Channels 8
• Trigger input signal NIM standard
• Anode input signals ECL levels
• Minimum least count 20 nsec
• Dynamic range 12 bits
• Minimum full scale 81.96 msec
• Data interface PC (ISA)

4. TDC Control Section
The control section performs a variety of signal
translations between the TDC counter section and
the PC interface section. The NIM level trigger
signal and ECL based anode signals are translated
into TTL signals here using typical circuits
shown in Fig.3 and Fig.4 respectively.
Fig 6 TDC Counter Section
Fig 1 Operating Principle of a Drift Chamber
6. PC Interface Section
The interface section is a simple 16-bit I/O
implementation of an ISA bus. It consists of
standard decoding and buffering schemes as well
as a jumper selectable boards I/O address
sections. While input is 12-bit TDC data, as well
as the trigger status bit used for software
polling , the output data is the counter number
used by the control section for decoding. The
enable lines for these I/O ports as well as
control signals such as MClr and Ldc are
generated by a 2 to 4 decoder on board. Schematic
of the PC interface section is shown in Fig.7.
Fig 1. Schematically illustrates the basic
operation of a Drift Chamber. The drift cell is
defined at one end by a high voltage electrode
and at the other end by the anode of a simple
proportional counter. In order to create a
constant electric field, a series of cathode
field strips individually held at a gradient of
voltages line the drift region. To signal the
arrival of a particle, scintillator paddles
covering the entire Drift Chamber are placed
above and below the chamber. A particle
traversing the chamber and the scintillator
telescope, liberates electrons in the gas which
then begin drifting towards the anode. At the
same time, the fast signal from the telescope
starts a timer. The signal created at the anode
as the drifting electrons arrive then stops the
timer to yield the drift time.
Fig 3 NIM-TTL translator for trigger input
Fig 4 Typical ECL-TTL converter for anode signals
Enable signals (EN 07) to the counters are
generated on trigger using master flipflop. While
this is cleared (MClr) by software just before
going in a loop waiting for a trigger, the
flipflop also provides trigger status (TSta) to
the software. 50 MHz clock (Clk07) is provided
to the counters between the trigger and
individual anode signals using the master
flipflop as well as the anode signal flipflops.
Decoder signals (De07) for individual counter
readout buffers using common 12-bit data bus are
generated here and so are the load signals
(Ld07) to the counters. Schematic diagram of the
control section is shown below
2. Readout scheme of a Drift Chamber
A Drift Chamber of dimensions about 42x22x23 cms
has been designed and constructed (N.K.Mondal,
S.D.Kalmani, P.Verma, B.Satyanarayana Piyali
Banerjee). It consists of 8 anode wires and
operates on a gas mixture of Argon and Carbon
dioxide. While cathode electric field is
generated across a 10 kV potential, anode wires
are held at about 3 kV.
Fig 7 PC Interface Section
7. Performance and Results
The TDC has met all the design specifications and
shown excellent linearity and stability over the
entire dynamic range. Linearity plot of a typical
channel for calibration test inputs is shown in
Fig.8
Fig 2 Readout Scheme of a Drift Chamber
Signal conditioning and data acquisition scheme
of the Drift Chamber is shown in Fig.2. Anode
signals are amplified and converted to ECL logic
signals using a commercial module. Coincidence or
trigger signal is generated using a commercial
majority logic unit on the scintillator paddle
signals produced by photomultiplier tubes. A PC
based Time-to-Dgital Converter (TDC) which
digitises the time intervals between the NIM
standard trigger signal and ECL based anode
signals, has been designed. The TDC, whose main
specifications are listed in the next section, is
implemented on two circuit boards for convenience.
Fig 5 TDC Control Section
5. TDC Counter Section
This section consists of eight identical units of
12-bit counters as well as buffers for the
counter value readout. The Enable, Clock and Load
signals for the data buffers are generated by the
control section as described above. The common
data bus is routed via the control section to the
interface section. Schematic of counter section
is shown below
Fig 8 Linearity of Drift Chamber TDC
National Symposium on Instrumentation (NSI-27),
November 27-29, 2002, Department of Physics,
Bharathiar University, Coimbatore, Tamil Nadu