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SENIOR DESIGN

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Title: SENIOR DESIGN


1
SENIOR DESIGN
  • 10/3

2
TERMINOLOGY
  • Microcontroller vs. Microprocessor vs.
    Microcomputer
  • A microprocessor is a central processing unit on
    a single chip.
  • A microprocessor combined with support circuitry
    , peripheral I/O components and memory (RAM
    ROM) used to be called a microcomputer.
  • A microprocessor where all the components
    mentioned above are combined on the same single
    chip that the microprocessor is on, is called a
    microcontroller.
  • We will be using the ATMEGA 8 microcontroller.

3
MICROCONTROLLER ARCHITECTURE
4
MICRCONTROLLER ARCHITECTURE
  • 1 CPU -- fetches the instructions stored in the
    program memory, decodes them, and executes them.
    The CPU itself is composed of registers the
    arithmetic logic unit, the instruction decoder
    and control circuitry.
  • 2 PROGRAM MEMORY The program memory stores the
    instructions that form the program. To
    accommodate larger programs, the program memory
    may be partitioned as internal program memory and
    external program memory (in some controllers).
    Program memory is usually nonvolatile and is of
    EEPROM, EPROM, Flash, or OTP (one-time
    programmable) type. EEPROM for Atmega8.
  • 3 RAM The RAM is the data memory of the
    controller. The CPU uses RAM to store variables
    as well as the stack. The stack is used by the
    CPU to store return addresses from where to
    resume execution after it has completed a
    subroutine or an interrupt call.

5
MICRCONTROLLER ARCHITECTURE
  • 4 CLOCK OSCILLATOR The controller executes the
    program out of the program memory at a certain
    rate. This rate is determined by the frequency of
    the clock oscillator. The clock oscillator could
    be an internal RC-oscillator this is the case
    for the Atmega 8, or an oscillator with an
    external timing element, such as a quartz crystal
    or RC circuit. As soon as power is applied to the
    controller, the oscillator starts operating.
  • 5 RESET AND BROWNOUT DETECTOR CIRCUIT The reset
    circuit in the controller ensures that at startup
    all the components and control circuits in the
    controller start at a predefined initial state
    and all the required registers are initialized
    properly.
  • The brownout detector is a circuit that monitors
    the power supply voltage, and if there is a
    momentary drop in voltage, resets the processor
    so that the drop in voltage does not corrupt
    register and memory contents, which could lead to
    faulty operations.

6
MICRCONTROLLER ARCHITECTURE
  • 6 SERIAL PORT The serial port can operate at
    any required data transfer speed. The serial port
    takes data bytes from the controller and shifts
    out the data one bit at a time to the output.
    Similarly, it accepts external data a bit at a
    time, makes a byte out of 8 such bits, and
    presents this to the controller.
  • 7 DIGITAL I/O PORT The microcontroller uses the
    digital I/O components to exchange digital data
    with the outside world. Compared to the serial
    port, which transfers data a bit at a time, the
    data from the I/O port is exchanged as bytes.
  • 8 ANALOG I/O PORT Analog input is performed
    using an analog-to-digital converter (ADC). The
    controller could be equipped with an integrated
    ADC or an analog comparator the Atmega 8 has
    both (?) , which is used under software control
    to perform A-to-D conversion. ADCs are used to
    acquire senor data from devices such as
    temperature sensors and photocells. Such sensors
    often produce proportional analog voltage data.
  • Analog output is performed using a
    digital-to-analog converter (DAC) must be
    externally in case of Atmega 8.
  • Most controllers are equipped with pulse-width
    modulators that can be used to get analog voltage
    with a suitable external RC filter this is the
    case for the Atmega8. DACs are used to drive
    motors, to generate sound, for visual displays..
    (dimming LEDs).
  • SENSORS assignment.

7
MICRCONTROLLER ARCHITECTURE
  • 9 TIMER The timer is used by the controller to
    time events. The timer can also be used as a
    counter.
  • 10 WATCHDOG TIMER A watchdog timer (WDT) is a
    special timer with a specific function. It is
    usually used to prevent software crashes. It
    works as follows Once armed, the WDT increments
    an internal counter at some rate. If the user
    program does not reset the counter, the counter
    overflows, which is used to reset the controller.
    .. . The assumption is that if the user program
    does not reset the WDT, it has failed in some way
    and therefore rather than system crash or
    unpredictable system performance, it is better to
    reset the system.
  • 11 RTC A real time clock (RTC) is a special
    timer with the task of maintaining time of day,
    date etc.. . It can be used to time-stamp events
    must be externally added to Atmega8.
  • -------------------------------------------------
  • Like microprocessors, microcontrollers are
    classified as 8-bit, 16-bit, etc.. . This refers
    to the width of the internal registers and the
    accumulator.
  • An 8-bit system usually also means that the CPU
    connects to the various chip component through an
    8-bit data path.

8
MICRCONTROLLER ARCHITECTURE
9
FROM ATMEGA8 Datasheet.
In order to maximize performance and parallelism,
the AVR uses a Harvard architecture with
separate memories and buses for program and data.
Instructions in the Program memory are executed
with a single level pipelining. While one
instruction is being executed, the next
instruction is pre-fetched from the Program
memory. This concept enables instructions to be
executed in every clock cycle. The Program memory
is In- System Reprogrammable Flash memory. The
fast-access Register File contains 32 x 8-bit
general purpose working registers with a single
clock cycle access time. This allows single-cycle
Arithmetic Logic Unit (ALU) operation. In a
typical ALU operation, two operands are output
from the Register File, the operation is
executed, and the result is stored back in the
Register File in one clock cycle.
10
Six of the 32 registers can be used as three
16-bit indirect address register pointers
for Data Space addressing enabling efficient
address calculations. One of the these address
pointers can also be used as an address pointer
for look up tables in Flash Program memory. These
added function registers are the 16-bit X-, Y-,
and Z-register, described later in this
section. The ALU supports arithmetic and logic
operations between registers or between a
constant and a register. Single register
operations can also be executed in the ALU.
After an arithmetic operation, the Status
Register is updated to reflect information about
the result of the operation. The Program flow is
provided by conditional and unconditional jump
and call instructions, able to directly address
the whole address space. Most AVR instructions
have a single 16-bit word format. Every Program
memory address contains a 16- or
32-bit instruction. Program Flash memory space is
divided in two sections, the Boot program section
and the Application program section. Both
sections have dedicated Lock Bits for write
and read/write protection. The SPM instruction
that writes into the Application Flash
memory section must reside in the Boot program
section. During interrupts and subroutine calls,
the return address Program Counter (PC) is stored
on the Stack. The Stack is effectively allocated
in the general data SRAM, and consequently the
Stack size is only limited by the total SRAM size
and the usage of the SRAM. All user programs must
initialize the SP in the reset routine (before
subroutines or interrupts are executed). The
Stack Pointer SP is read/write accessible in the
I/O space. The data SRAM can easily be accessed
through the five different addressing modes
supported in the AVR architecture. The memory
spaces in the AVR architecture are all linear and
regular memory maps. A flexible interrupt module
has its control registers in the I/O space with
an additional global interrupt enable bit in the
Status Register. All interrupts have a separate
Interrupt Vector in the Interrupt Vector table.
The interrupts have priority in accordance with
their Interrupt Vector position. The lower the
Interrupt Vector address, the higher the
priority. The I/O memory space contains 64
addresses for CPU peripheral functions as
Control Registers, SPI, and other I/O functions.
The I/O Memory can be accessed directly, or
as the Data Space locations following those of
the Register File, 0x20 - 0x5F.
11
ATMEGA 8 FEATURES --- LOOK AT DATASHEET !
High-performance, Low-power AVR 8-bit
Microcontroller Advanced RISC Architecture
130 Powerful Instructions Most Single-clock
Cycle Execution 32 x 8 General Purpose Working
Registers Fully Static Operation Up to 16
MIPS Throughput at 16 MHz On-chip 2-cycle
Multiplier Nonvolatile Program and Data
Memories 8K Bytes of In-System
Self-Programmable Flash Endurance 10,000
Write/Erase Cycles Optional Boot Code Section
with Independent Lock Bits In-System Programming
by On-chip Boot Program True Read-While-Write
Operation 512 Bytes EEPROM Endurance 100,000
Write/Erase Cycles 1K Byte Internal SRAM
Programming Lock for Software Security
Peripheral Features Two 8-bit Timer/Counters
with Separate Prescaler, one Compare Mode One
16-bit Timer/Counter with Separate Prescaler,
Compare Mode, and Capture Mode Real Time
Counter with Separate Oscillator Three PWM
Channels 8-channel ADC in TQFP and MLF
package Eight Channels 10-bit Accuracy
6-channel ADC in PDIP package Eight Channels
10-bit Accuracy Byte-oriented Two-wire Serial
Interface Programmable Serial USART
Master/Slave SPI Serial Interface Programmable
Watchdog Timer with Separate On-chip Oscillator
On-chip Analog Comparator
12
ATMEGA 8 FEATURES --- LOOK AT DATASHEET !
Special Microcontroller Features Power-on Reset
and Programmable Brown-out Detection Internal
Calibrated RC Oscillator External and Internal
Interrupt Sources Five Sleep Modes Idle, ADC
Noise Reduction, Power-save, Power-down,
and Standby I/O and Packages 23 Programmable
I/O Lines 28-lead PDIP, 32-lead TQFP, and
32-pad MLF Operating Voltages 2.7 - 5.5V
(ATmega8L) 4.5 - 5.5V (ATmega8) Speed
Grades 0 - 8 MHz (ATmega8L) 0 - 16 MHz
(ATmega8) Power Consumption at 4 Mhz, 3V,
25C Active 3.6 mA Idle Mode 1.0 mA
Power-down Mode 0.5 µA
13
ATMEGA 8 PINOUT
14
ATMEGA8 / ARDUINO INTEGRATION
15
ATMEGA8 / ARDUINO INTEGRATION
16
PINMAPPING
17
AVR LIB ARDUINO
  • AVR hardware specifically designed to work with
    C-compiler. Pic/ Assembly-yes, AVR/ Assembly
    -good luck )

18
DICE
  • This assignment introduces you to the digital IO
    ports on the Atmega8. You will create a dice game
    using 8 digital pins.
  • The game should do the following
  • 1) When the game is turned on, each possible
    value (1-6) will be displayed on each die.
  • 2) Whenever the button is pressed, the dice will
    "roll" and then display a random value, first die
    one, then on die two.
  • Supplies
  • 14 leds, 7 each of two different colors
  • 10 x 1k ohm resistors
  • 1 x 47k ohm resistor
  • 1 momentary on pushbutton switch
  • 2 x 2n2222 switching transistors
  • wire

19
This schematic indicates the connections to the
ATMEL, NOT to the Arduino ports. You have to
compare the schematic below to the Arduino
schematic available on our resource site, in
order to complete this assignment.
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Senior Design Winter Quarter
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