Manchester Mark I and Atlas: A Historical Perspective

1
Manchester Mark I and Atlas A Historical
Perspective

• Presented by Aurel Cami
• CDA5106 - Advanced Computer Architecture I
• Instructor Prof. Euripides Montagne

2
Introduction

• 1946-1976 Five computer systems at Manchester
  University. We focus on 2 of them Mark I and
  Atlas.

University Project Industrial Derivative
Manchester Mark I 1946-1949 hardware dev. June 1948 first prototype 1949 enhancements Ferranti Mark I 1951 first installation 1957 last one delivered
Manchester Atlas 1956-1962 hardware dev. 1962 first installation Ferranti Atlas 1962 first installation 1965 last one delivered
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Introduction (contd)

• Continuous advancement from Mark I to Atlas in
• Instruction format
• Operand address generation
• Memory management
• Use of high-level programming languages
• Focus of this talk (for each computer)
• Objectives of the project
• Technology, Architecture, System software
• Evaluation

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Mark I Objectives

• Original objective Testing evironment for
  William Tubes storage
• Prototype Mark I
• Operational in June, 1948
• First GP stored-program computer (Baby)
• Objective after the first prototype Enough
  memory and computing power to solve number-theory
  problems

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Mark I Technology

• Logic
• EF50 EF55 pentodes
• EA50 vacuum tube diodes
• Fast Storage
• Registers (William Tubes)
• RAM (William Tubes)
• Backing Storage
• Drum - 30 msec revolution time
• I/O devices
• Input 5-track paper tape reader
• Output tape and printer

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Mark I Architecture

• Serial-ALU, single-address computer
• Hardware add, subtract, multiply and logic
• Word length 32 bits ( in 1949 40 bits )
• Accumulator register 80 bits ( 2 words )
• 2 B-lines (index registers) 20 bits each
• Instruction length 20 bits ( 2 instructions per
  word)
• Instruction Set 26 op codes (in 1949)
• RAM 128 words
• Drum Memory 1024 words

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Mark I Architecture (contd)
ADDRESS B FUNCTION

• 10 3 1
  6
• Instruction Format
• Address ( 10 bits )
• B-line ( 3 bits )
• Function (op-code) ( 6 bits )
• Operands 40 bit words
• Transfer to/from drum peripheral devices
  through control words of two kinds
• Drum transfers control word
• I/O transfers control word

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Mark I Architecture (contd)

• Paging
• RAM 8 pages ( on 8 William Tubes )
• Single/Double page transfers
• Track address stored with each page on drum
• When page became resident in main store an extra
  20 bit on each Williams tube held page
  track-address

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Mark I System Software

• In 1949 no system software for Mark I
• Programming using 5-bit teleprinter code (one
  character 5 bits)
• 1954 Autocode, scientific PL for Mark I
• Arithmetic on floating-point variables v1,v2,
• Integers n1,n2, used as indices/counters
• Simple conventions for control transfers, I/O,
  intrinsic functions etc.,
• Simulated one-level store programmer did not
  have to organize his own drum transfers

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Mark I Evaluation

• Performance
• Drum transfers 16 of the time
• Multiplication 28 of the time
• Other arithmetic ops. 56 of the time
• Multiplication 2.16 msec
• Other accumulator instr. 1.2 msec
• Long-term significance
• Proved viability of digital storage via William
  tubes
• Inspired British government to support Ferranti
  Ltd.
• Focused on linking fast RAM with slower
  sequential
• access rotating memory (drum)
• Autocode allowed users to program in a virtual
  (drum) address space

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Atlas Objectives

• Goal build a high-performance machine to stay in
  competition
• Higher computing speed (1 microsec/instruction)
• More memory (RAM size 100K words)
• Ability to attach more I/O devices
• Efficient and economic utilization of the system
  (intended to be sold in open market)

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Atlas Technology

• Logic circuits
• OC170 germanium junction transistor INVERTER
• Diodes GATING
• Parallel adder Special symmetrical transistor
  (SB240)
• 80,000 transistors mounted on printed-circuit
  boards
• Storage
• Main store (16K-48K) core memory, 4-way
  interleaved
• Backup store 4 drums each 24K
• High speed ROM (fixed store) 8K
• OS working storage 1-4K
• Bulk storage tapes, disks
• I/O devices
• 17 I/O devices attached
• Interrupt mechanism allowed up to 512 peripheral
  units

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Atlas Architecture

• Parallel computer
• 2 independent ALUs ( A and B)
• Pipelined
• Overlap 3 A instructions
• Any B instruction in parallel with A
• 48-bit word
• One-address instruction. Format

FUNCTION Ba Bm ADDRESS
10 7 7 24
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Atlas Architecture (contnd)

• Two types of instructions
• Normal instructions
• Extracode (implemented in software routines
  stored in fixed store, e.g sqrt, log, cosine)
• Three types of normal instructions
• Accumulator instructions
• Index register instructions
• Test-and-count instructions
• Peripheral devices incorporated into the total
  address space (through peripheral device
  registers part of V-Store )

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Atlas Architecture (contd)

• Paging
• 512 word pages
• Introduced page address register (32 of them)
• Address translation time 40 of total OF time
• Pages for several programs could be in core
  memory concurrently (managed through locking)
• Programmer treated the drum and core as a
  One-Level store ( 576Kb)

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Atlas System Software

• OS Atlas Supervisor
• Multiprogramming (up to 16 jobs)
• On-line spooling of I/O
• Job scheduling (based on priority, volume etc.,)
• Compilers
• First Atlas Autocode
• Block-structured language
• Similar to Algol 60
• Later compilers for Algol, Cobol, Fortran

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Atlas Evaluation

• Performance
• Fixed-point B-addition 1.59 microsec
• Floating-point add 1.61 microsec
• Floating-point multiply 4.97 microsec
• Floating-point divide 10.66 microsec
• Throughput
• 1 Atlas 4 IBM 7094s
• 1967 benchmark comparison
• Atlass Univac CDC 6600
• 1 2.1 5.9

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Atlas Evaluation (contd)

• Long-term significance
• Pipeline techniques
• Paging and virtual memory
• OS features multiprogramming, job scheduling
• One of the first computers to design hardware to
  aid OS (e.g. interrupts, store management)

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CONCLUSIONS

• Mark I and Atlas demonstrate a clear progression
  of design concepts in computer systems
• Many of the innovations introduced in Mark 1 and
  Atlas stored-program, virtual memory, pipeline,
  OS modern features have become the standard in
  todays computer systems

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REFERENCES

• S.H.Lavington.(1978). The Manchester Mark I and
  Atlas A Historical Perspective, Communications
  of the ACM, 21(1), 4-12
• http//www.computer50.org/mark1 - the University
  of Manchester website on the Mark 1 system
• http//www.science.uva.nl/faculteit/museum/CoreMem
  ory.html - an overview of the core memory (used
  with Atlas)
• http//www.ukuug.org/events/linux2001/papers/html/
  DAspinall.html - a discussion of the Atlas
  computer technology and architecture