A Roadmap to the Digital Power Lab' - PowerPoint PPT Presentation

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A Roadmap to the Digital Power Lab'

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Title: A Roadmap to the Digital Power Lab'


1
A Roadmap to theDigital Power Lab.  
VTB Conference 2004 Sep. 15, 2004
  • Antonello Monti
  • Dept. of Electrical Engineering
  • University of South Carolina
  • Columbia, SC 29208

2
Summary
  • The DPL concept
  • VTB and Real Time
  • VTB and external interfaces
  • Overview of the on-going effort
  • The 2005 ESRDC Control Demonstration

3
Challenges on the DPL
Real World
HF Power Interface
Real-Time Simulation VTB-RT
HF Signal Interface
DPL
4
Simulation
Real-Time Simulation VTB-RT
Multiprocessing VTB-RT on VXI
VTB-RT on DSP
5
VTB-RT on VXI
  • Why Real-Time Distributed Simulation
  • More flexible.
  • More effective.
  • Able to deal with complex and dynamic models.
  • Available commercial tools
  • Expensive.
  • Complicated proprietary hardware.

2
6
VTB-RT
  • RTVTB is an adaptation of the Linux version of
    VTB.
  • RTVTB is inexpensive
  • Free OS - Linux
  • Open-source software RTAI
  • RTVTB is a hard real-time simulation environment.
  • RTVTB shares its architecture with VTB windows.

3
7
Distributed Simulation
Complex System
Subsystem 1
Subsystem 2
Subsystems 3 n
RTClock
RT VTB
RT VTB
RTClock
PC 2
PC 1
RT VTB
RTClock
PC 3 n
5
8
The real HW and .the real people
9
Opportunities
VXI bus
COTS solution
PC
PC
PC
PC
10
VTB-RT on DSP
  • Why DSP?
  • 1.High-performance processor
  • 2. Multi-function integrated I/Os
  • 3. Enable scalable multiprocessing system

11
Software Architecture
  • Schematic Editor
  • Solver
  • Graphic Tools

ADSP TS101 TS
VTB Solver
.vts file
Under Microsoft Windows
VTB Schematic Editor
12
DSP version
  • Hardware Feature
  • 1. 250MHz processor
  • 2. 6M bits of Internal Memory
  • 3. 32MB PC2100 External SDRAM
  • Binary code can be downloaded to ROM or FLASH
    memory.
  • Support boot loadable and non-boot loadable PROM
    image file

13
DSP Solver
  • Example System
  • Timestep 0.0001
  • Tolerance 7e-006
  • Simulation time1s
  • R1R21000?
  • L1mH
  • C1mF

14
DSP Solver
  • Time DSP Windows
  • 0.0081 3.99581 3.99581
  • 0.0082 4.01588 4.01588
  • 0.0083 4.03555 4.03555
  • 0.0084 4.05483 4.05483
  • 0.0085 4.07373 4.07373
  • 0.0086 4.09224 4.09224
  • 0.0087 4.11039 4.11039
  • 0.0088 4.12817 4.12817
  • 0.0089 4.1456 4.1456
  • 0.009 4.16267 4.16267
  • 0.0091 4.17941 4.17941
  • 0.0092 4.19581 4.19581
  • 0.0093 4.21189 4.21189

15
Future Work
  • Add more models into system
  • Reconfigure the memory map
  • Optimize code
  • Parallel computing using two DSPs on the board
  • I/O management

16
Opportunities
17
AlGaN/GaN MOSHFET Power Converter
  • Benefits
  • High Switching Speed
  • High electron mobility
  • High Saturation velocity
  • 2-D electron gas at heterojunction
  • Low Forward Voltage Drop
  • Low specific on resistance
  • High Reverse Breakdown Voltage
  • High critical electric field

18
AlGaN/GaN MOSHFET Power Converter
  • Power Converter Schematic

19
Structure of the proposed interface
Real-TimeVTB
Gate Signal Averaging Interface
DAQ
VTB EXTERNAL INTERFACEMODEL
Hardware Controller
Hardware Interface
Gate signals
12-bit parallel communication
20
System example
iL

Block diagram d is the duty cycle of the PWM
signal
Buck Converter
R-L Load
VDC
-
d
VTB schematic
21
Acquisition of the PWM input signal d (t)
Real input signal
Software-only approach _at_ 50 ms resolution
Custom hardware interface _at_ 0.5 ms resolution
22
VTB simulation results
30
20
25 ms
25 ms
10
Simulation with 0.5 ms time step
Simulation with 50 ms time step
23
Current waveform of the HIL simulation
2.5 V
1.5 V
rescaled using a scaling factor of 1/10 due to
the voltage range limitation of the data
acquisition card
0.5 V
25ms
24
2005 ESRDC Control Demonstration
  • Show the progress of the consortium in the field
  • Show how the different efforts can be integrated
    giving concreteness to the strength of the
    Consortium

25
Demo Roadmap
26
The Zero Power Demo
VTB-RT Switchboard
VTB-RT Critical Load
VTB-RT Sensitive Load
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