The Ring Counter

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The Ring Counter

• Presented By
• Mark Fulgham
• Christina Lopez
• Imad Richani

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The Design
3
The Schematics
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The Decoder Design

• We used a 4 to 16 decoder and 7 OR gates (lab 5).
  This multi-output system that we designed was
  used to operate our 7 segment display.

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The Counter Design

• For the Counter design we used three D-Flip Flops
  and gates. Our only input was the clock. We
  combined our 3 outputs out0, out1, and out2
  (present state) into a bus, which looped back
  into the gates and into the D-Flip Flops (next
  state).

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The Ring Counter
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The Counter Sequence

• The State Diagram is

000
010
111
011
101
10
The Final Design

• In the final step to design our Ring Counter and
  display the numbers, we combined the Counter with
  the 7-segment display. This gave us the sequence
  we wanted, which displayed on the 7-segment
  display. This sequence is 0 2 3 5 7.

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End