Distributed Data Acquisition System on Embedded Technology

1
Distributed Data Acquisition System on Embedded
Technology

• Partha Dhara
• Data Acquisition Development Section,
• VECC, Kolkata

2
Contents

• Current DAQ system
• DAQ requirement for SCC experiments
• Distributed DAQ system with ASIC
• Distributed DAQ system with digital filters

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Win32 CAMAC DAQ

• T32 and its different versions
• Designed with Visual C and Windows API
• Supports CAMAC only
• Widely used in experiments with room temperature
  cyclotron

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Current DAQ system

• Object-oriented multi-threaded DAQ software (C
  QT)
• Supports both CAMAC, VME
• Ported on Linux, Windows XP/2003

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Current DAQ Hardware

• CAMAC, VME and NIM modules
• Wide vendor support
• Analog processing modules like preamp,
  spectroscopic amplifier, discriminators etc are
  procured
• Hi-speed VME setup

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Hardware development facility

• CAMAC, VME NIM module design in digital domain
• Advanced FPGA/CPLD based design facility

General purpose CAMAC
Scalar Rev 0.1
RS232 to Ethernet
Pulsar Rev 0.1
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DAQ requirement for SCC

• Si strip detector for charge particle
  identification
• Forward Array 1248 channels
• Backward array 1000 channels
• Wide dynamic range 100Mev to 2Gev
• Good resolution for isotopic separation better
  than 50Kev
• Front-end electronics kept close to detectors

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DAQ Design with ASIC
Detector Telescope

• Distributed DAQ organized in four hierarchical
  layer
• Front-end board
• Read-out board
• Local Data Concentrator
• DAQ Workstation (user interface)
• Design is highly scalable and modular

48 Si detector signal in parallel connector
Front-end board
Preamp bias
48 Mux Gaussian signal
Read-out board
Hi-speed digital serial link to PCI
Local Data Concentrator
Gigabit Ethernet
DAQ Workstation
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DAQ organization
Detector Array
Front-end board
Front-end board
Front-end board
Front-end board
Read-out board
Read-out board
Read-out board
Read-out board
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Front-end board
Detectors

• ASIC chip for analog processing
• Preamp, shaper and pole-zero adjustment by the
  ASIC chip
• 16 or 32 channel per ASIC with multiplexed output
• Multiple ASIC chip in single board
• Kept very close to detector, inside vacuum
  chamber
• Heat-sink and liquid cooling arrangement

16ch
To RO board
ASIC chip
ASIC chip
Multiplicity out
Control bus
ASIC readout controller
Sequencer in
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Read-out board Schematic
BUF
Event generator
Sampling ADC
PCI interface card
Sequencer
Front-end board
ASIC control
Controller Trigger handler
Trig out
Trigger in
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Local Data Concentrator

• Industrial PC, kept inside experimental vault
• Point-to-point link with multiple read-out card
• Runs distributed instance of DAQ read-out program
• Reads, configures the Read-out boards
• Sub-Event generation and send to DAQ workstation
  over the Ethernet

Read-out cards
LDC
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DAQ Workstation
DAQ UI

• Graphical User interface, Histogram, storage
• Controls and configures local data concentrator
  over TCP/IP
• ASCII commands for network communication, Script
  based configuration
• Dynamic histograms
• Hit count register and other monitoring utility
• Scripting capability for histogram manipulation

CMD
Data
LDC
LDC
RO board
RO board
FEE
FEE
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DAQ Design with digital filter
Detector Telescope

• Front-end board with Pre-amp and Anti-aliasing
  filter
• Read-out board digital filter and communication

48 Si detector signal in parallel connector
Front-end board
Preamp bias
48 Mux Gaussian signal
Read-out board
Hi-speed digital serial link to PCI
Local Data Concentrator
Gigabit Ethernet
DAQ Workstation
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Read-out board with digital filter
FEE board
Preamp
Anti-aliasing filter
ADC 125MSPS
MEMORY
Peak detection
Ch 1
Digital Filter
Event generator
Gigabit link
Trigger Control unit
N Channels
Trigger in
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Digital filter approach advantages

• Off the shelf High-end FPGA/DSP components
• High speed ADC for sampling pre-amp signal
• No need for analog ASIC chip
• Low cost solution
• FEE board only have pre-amp anti-aliasing filter

Trapezoidal pulse shaping
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Digital CR-RC filter Simulation
Fig. 1 Exponential pulse input
Fig 2. output Gaussian pulse
Fig. 3 Overlapped input pulses.
Fig 4.The resolved pulses
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Simulation Trapezoidal shaping
Fig 1 Input pulse
Fig 2 Trapezoidal shaping
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Conclusion

• We have a stable DAQ software solution capable of
  handling all current experimental needs
• We are enhancing the software for the next
  generation distributed DAQ
• We could provide CAMAC and VME based hardware
  solution
• We are developing advanced DSP hardware for
  distributed DAQ

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Acknowledgement

• I acknowledge the generous cooperation from
• DAQ and Dev Section
• Charge particle detector array lab
• Gamma detector array lab

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Thank You