Proposed design of FPIX pulse injection system

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Proposed design of FPIX pulse injection system

• Patrick L. McGaughey
• 8/17/06

Dual DAC, serially downloaded from slow controls
or FPGA Triggered via fast controls or FPGA 3.3V
CMOS, low power Prototype laid out on VME card,
controllable from PC. SOIC surface mount parts
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Slide Titles are Left Justified, Arial Bold 28
pt., Initial Caps

• Primary items, suggested ratio 24 pt.
• Secondary items 20 pt.
• Sub-statements 18 pt.
• Use this format consistently throughout. Use
  initial cap on first word only.
• Dont overwhelm the audience with too many
  lengthy bullets on each slide page.
• Dont forget to use a spell checker.

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