CSIS 3510 Computer Organization and Architecture

1
CSIS 3510 Computer Organization and Architecture

• Topics covered in this lecture
• Review of DeMorgans Theorem
• Using DeMorgans Theorem
• Building a 2-bit decoder
• Algebraic Reduction of Boolean Expressions
• 7-segment decoder

2
DeMorgans Theorem

• On of the most useful principles in boolean
  algebra is DeMorgans Theorem, which allows one
  to switch between ANDs and NORs and ORs and
  NANDs.
• Remember, we want to design circuits using AND
  and OR, but then implement them using NAND and
  NOR (AND transistor bleed-through problem, and
  manufacturing layering minimization)
• NOT terms or Inverted terms are represented with
  a line over the terms
• AB A B
• A B AB
• We demonstrated the validity of DeMorgans by
  Perfect Induction, using a truth table.

3
Using DeMorgans Theorem

• To convert AB into a form that can be
  implemented using a NAND gate follow these steps
• 1. Double Complement the term AB AB
• 2. Use DeMorgans to distribute one of the
  complements
• AB A B
• The equation is now a NAND of the complemented
  inputs.
• To convert AB into a form that can be
  implemented using a NOR gate follow these steps
• 1. Double Complement the term AB AB
• 2. Use DeMorgans to distribute one of the
  complements
• AB A B
• The equation is now a NOR of the complemented
  inputs.

4
Extracting a function from a truth table and
converting

• A B Output
• 0 0 0
• 0 1 1
• 1 0 0 Out A B
• 1 1 0 DoubleC A B
• DeM A B
• Simplify A B

5
Two-Bit Decoder

• A B F0 F1 F2 F3
• 0 0 1 0 0 0
• 0 1 0 1 0 0
• 1 0 0 0 1 0
• 1 1 0 0 0 1

F0 A B A B AB AB F1 A B A B AB
AB F2 A B A B AB AB F3 A B A B
AB
6
Two-Bit Decoder Diagram
A A B B
F0
F1
F2
F3
7
Algebraic Reduction of Boolean Functions

• Algebraic reduction is used to minimize a
  function extracted from a truth table or other
  source.
• Principle is to look for terms where a single
  variable is present in both complemented and
  positive form. Those variables can be deleted
  from those terms.
• Note terms can be used over in multiple
  minimizations.
• Examples
• A B A B B, A B A B A
• A B C A B C A B
• A B C A B C A B C A B C
• A B A B
• A

8
7-Segment Display Decoder

• 7 Segment Display
• Displaying 0, 1, 2, 3

0
5
1
6
4
2
3
9
7-Segment Display Truth Table

• (Displaying values from 0-3 only)
• A B F0 F1 F2 F3 F4 F5
  F6
• 0 0 1 1 1 1 1
  1 0
• 0 1 0 1 1 0 0
  0 0
• 0 1 1 0 1 1
  0 1
• 1 1 1 1 1 1 0
  0 1

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Extracting and Minimizing Segment Functions

• F0
• F1
• F2
• F3
• F4
• F5
• F6

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Extracting and Minimizing Segment Functions

• F0
• F1
• F2
• F3
• F4
• F5
• F6

12
Extracting and Minimizing Segment Functions

• F0
• F1
• F2
• F3
• F4
• F5
• F6

13
7-Segment Display Decoder Diagram
14
Conclusion

• Topics covered in this lecture
• Review of DeMorgans Theorem
• Using DeMorgans Theorem
• Building a 2-bit decoder
• Algebraic Reduction
• 7-segment decoder
• Questions?