Title: Flow Control
1Flow Control
2Flow Control Goals
- Branching
- Condition code register
- Branch instructions
- Conditional branches
- Unconditional branches
- Know how to implement
- For loops
- While loops
- if/then/else statements
- Assigned Reading
- HVZ 3.11 Program Flow Control
3Flow Control The Condition Code Register
- The Condition Code Register (CCR) holds
information about the result of the most recently
executed arithmetic instruction. - There are five bits that are set by the ALU.
- N 1 if the last result was Negative
- Z 1 if the last result was Zero
- V 1 if the last operation resulted in
arithmetic overflow - C 1 if the last operation produced a carry
- addition 1 if there was a carry out from most
significant bit - subtraction 1 if there was a borrow required
- X special operand for multiprecision
computations. We wont be using this bit.
N Z V C
4Table C.5
5Table C.4
6Flow Control Branch Instructions
- The mnemonics for the branch instructions assume
that you are following a SUB or a CMP
instruction - BEQ (branch when equal) Z1
- SUB.W D3,D4
- BEQ LOOP
- when does Z1?
- When D3 and D4 are equal!
- Remember that CMP and SUB computedest src
7CMP Bcc instructions
- CMP Operations performed d s
- Result doesnt go anywhere! Why?
- Bcc represents many instructions
- BEQ branch when equal (Z1)
- BNE branch when not equal (Z0)
- BVS branch when overflow set (V1)
- BPL branch when result positive (N0)
- BRA always branch
- See table C.6
8Flow Control Conditional Branch Instructions -
Bcc
- CMP src, dest
- BEQ Branch to TARGET if src dest
- BNE Branch to TARGET if src ! dest
- BLT Branch to TARGET if dest is less than src
- BLE Branch to TARGET if dest is less than or
equal to src - BGT Branch to TARGET if dest is greater than
src - BGE Branch to TARGET if dest is greater than or
equal to src
9Flow Control Bcc
- You can also think of Bcc as comparing the result
of the last operation to zero
MOVE.W -3,D0 D0 is a counter,
starting LEA ARRAY,A0 at the value
-12 LOOP ADD.W (A0),D1 ADDQ.W 1,D0 Add 1 to
the counter BLT LOOP Loop while result lt
0 ARRAY DC.W 12,4,8
10Flow Control for loops
- for(i0 ilt5 i)
-
- CLR.B D0
- LOOP
- ADDQ.B 1,D0
- CMPI.B 5,D0
- BLT LOOP
This is easy to read, and necessary if you want
to use the value of i.
D0 - 5
However, you have to get the immediate value 5
from memory repeatedly. There is a more
efficient way to loop 5 times
11Flow Control Fixed loops
- Using a down counter. A more efficient way to
loop 5 times
- MOVEI.B 5,D0
- LOOP do something
- SUBQ.B 1,D0
- BNE LOOP BRA if Z0
- move on
12Flow Control while loops
- while (j lt 5) Test at beginning.
- condition (j lt 5) opposite (j ? 5)
- MOVE.W j,D0 get j from memory
- LOOP CMPI.W 5,D0
- BGE NEXT exit loop if
- condition false
- ADDQ 1,D0
- BRA LOOP
- NEXT
- j DC.W 2
13Flow Control Other ways to use branch
- You dont have to follow the mnemonics
- The best thing to do is to look at the branch
condition in Table C.6 - EXAMPLE for(j-5 j!0 j)
- MOVE.B -5,D0
- LOOP BEQ DONE
- do something
- ADDQ.B 1,D0
- BRA LOOP
- DONE move on
Well use D0 for j
BRA if Z1
BRA doesnt affect the CCR
14Flow Control Conditionals
- if (x 5)
- The most efficient way to code this is to skip
the code if the condition is not true. - MOVE.W x,D2
- CMPI.W 5,D2
- BNE SKIP
-
-
- SKIP next instruction
15Flow Control Ifthenelse
- if (y gt 3) true-codeelse false-code
MOVE.W Y,D0 CMPI.W 3,D0 BLE ELSE true-code
BRA NEXT ELSE false-code NEXT next-instruction
Again we test for the opposite of the if
condition, and skip the true-code if necessary.
At the end of the true-code, we use a BRA to
avoid also executing the false code.
16Example Adding n integers
MOVE.W N,D1 MOVE.W NUM,A2 CLR.W
D0 LOOP ADD.W (A2),D0 SUB.W 1,D1 BGT
LOOP MOVE.W D0,SUM END ORG 001000 N DC.W
7 NUM DC.W 3,5,8,10,5,12,14 SUM DS 1
MEMORY 1000 7 N 1002 3 NUM 1004 5 1006 8 10
08 10 100A 5 100C 12 100E 14 1010 ? SUM
17Branches and Overflow
- In the 68000 the V bit is set on 2s complement
overflow for the operand size (B, W, L) - BGE (branch when greater or equal)
- Branch when N?V 0
- Example SUB.B D1, D2 (DEST SRC)
- N0 when D2 ? D1
- What if D1 1, and D2 128?
- Can we represent 129 in an 8-bit byte in 2s
complement? (10000000 11111111) - The result is 127 (positive), N0, V1
- We dont branch, which is good since 128 lt 1 !
18Operation sizes and Overflow
- In the 68000, the V-bit is set when there is a
2s complement overflow for the size of operand
specified in the instruction! - In other words, suppose D0 00000063
- ADD.B 60,D0 sets V1 and N1
- ADD.W 60,D0 sets V0 and N0
- Same thing goes for the carry bit
- If a byte operation would produce a carry into
bit 8, the C bit is set, and bit 8 retains its
old value.
19Machine Code Branches
- 0110 CCCC PPPP PPPP or0110 CCCC 0000 0000PPPP
PPPP PPPP PPPP - Displacement can be an 8-bit or 16-bit value.
- Determined by assembler
- Dependent on the size of the jump
20Machine Code Branches - example
- LOOP ADD.W D2,D3 1 word
- SUB.W NUM, D1 3 words
- BGE LOOP 1 word
- Assuming LOOP is at address 1000, then the PC
contains 1008 after fetching the BGE instruction,
so the offset is 10 or F6 - The entire instruction is0110 1100 1111 0110
6CF6
21Putting it together Summing an array
ORG 1000 CLR.W D3
The sum will go into D3 MOVEA.L
NUMS,A1 A1 -gt current array element
MOVE.W LEN,D2 D2 number of array
elements remaining LOOP ADD.W (A1),D3
Add the next element SUBQ.W 1,D2
Now there is one less remaining
BNE LOOP Continue if D2 ! 0
MOVE.B EXIT,D7 TRAP
14 Exit back to the
simulator EXIT EQU 228
LEN DC.W 5 LEN
Size of the array NUMS DC.W
123,-56,453,-1045,765 NUMS the array
End
22Flow Control In-Class Exercises
23Did you know?
- You can give C a hint about which variables to
keep in registers?
register int counter int i, j counter 0 for
(i0 ilt100 i) for (j0 jlt100 j)
counter 3
24Flow Control You Should Know
- Review
- Condition code register
- LEA instructions
- Branch instructions
- Know how to implement
- For loops
- While loops
- if/then/else statements
- Unconditional branches
- Next Topic
- The Stack and Subroutines
- HVZ 3.13 Stacks and Subroutines