Static Software Timing Analysis

1
Static Software Timing Analysis

• Kaiyu Chen
• Princeton University
• 12/15/00

2
Problem Overview

• Definition
• Static analysis techniques that predict timing
  metrics (e.g. WCET/BCET, basic block execution
  counts) for software running on certain processor
• Only use information collected at or before
  compile time
• Restrictions
• Must be statically decidable (e.g. no infinite
  loops)
• Assume no interrupt or preemption
• Compared to on-the-fly (simulation) techniques
• Fast and low overhead
• Situations where impossible to simulate all
  traces
• May benefit from information collected by
  compiler

3
Application Scenarios
Static Timing Analysis
4
A General Solution Framework
5
On-going work

• Our goal
• A retargetable performance estimation tool that
  provides tight bounds for software performance in
  MESCAL
• Integrate Cinderella with Mescal Research Flow
• Replace Object file module and Instruction module
  with preprocessor that parse and extract all
  needed information from Mescal x-code compiler.
• Derive basic block cost coefficients from
  instruction schedule information (for classic
  VLIW machine) or link with Mescal x-code
  simulator to model other architectures.

6
Overview of Cinderella

• A self-consistent, retargetable static timing
  analysis tool for embedded software.
• Handle Program path analysis and
  Micro-architecture with a single uniform ILP
  based bounding technique
• Currently provide back-end support for Intel i960
  and Motorola M68000 chip with dedicated
  Instruction cache.

7
Block diagram
8
Operation flow chart
9
Flow analysis example
10
Solution Strategies

• Cache analysis
• l-block definition a contiguous sequence of
  instructions within the same basic block that are
  mapped to the same cache set, and thus have
  identical hit/miss behavior
• Cache behavior are captured by constructing cache
  conflict graph/ cache state transition graph,
  assigning variables to model its structure and
  associating them with flow analysis constraints
• ILP problem formulation
• Object function
• Total execution time ? Ci Xi
• With cache analysis
• ?i ?j (Ci.jhit Xi.jhit Ci.jmiss Xi.jmiss)

11
Cache analysis example
Constraints p(s, 4.1) p(s, 7.1) p(s, e) 1
p(s, 7.1) p(4.1, 7.1) ? x5 x4 p(s,4.1)
p(4.1,4.1) p(7.1,4.1) p(4.1,e) p(4.1,4.1)
p(4.1,7.1) p(4.1,4.1) ? x4hit ? p(s,4.1)
p(4.1,4.1) x4hit x4miss x4
12
Integrated Flow Chart
13
Characteristics

• Efficient
• Fast problem solution through IPET options
  available to allow tradeoff between speed and
  accuracy
• Accurate
• Provides safe and tight WCET/BCET bounds
• Modular
• Consists of clearly defined functional
  components clean interface written in C for
  extensibility
• Retargetable
• Target independent analysis core with flexible
  back-end support integrated in our retargetable
  software development environment

14
Future work

• Improvement on Cinderella
• Profile to obtain static known path information
• extend instruction semantics to deal with unknown
  data
• Use better model to capture the interaction
  between successive basic blocks
• e.g. gain modeling assign a gain value to each
  edge
• Take advantage of compiler data flow analysis and
  control flow analysis results
• e.g. loop bounds, mutual exclusive path detection

15
Future work

• Handle other execution time dominating features
  in modern architecture
• More ILP predicated execution
• Treat Hyper-block as multiple concatenating basic
  blocks
• Predicate relationship can be obtained from BDD
  package
• Cache analysis data cache, multi-level cache
• Hierarchical CCG/CSTG for multi-level cache
• Static analysis of branch prediction
• Static prediction vs. dynamic prediction scheme