Dlx - Registers

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Dlx - Registers

• 32 gpr registers r0,r1,r2,.r31
• 32 floating point registers f0,f1,f2,.f31
• R0 always holds zero (reduces the number of
  opcodes)
• 1 floating point status register (result of last
  compare)
• Add r1,r2,r3
• Registersr1 registersr2 registersr3

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Dlx Data Types

• 8 bit bytes, 16 bit half words, 32 bit words
• 32 and 64 bit floating point
• All alu operations work on 32 bits
• Some float operations work on 32 bit floats
• Other float operations work on 64 bit doubles
• Conversion operations between integer and float

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Addressing Modes

• Register (when a value is in a register)
• add r4,r3
• r4 r4 r3
• Immediate or literal (for constants)
• add r4,3
• r4 r4 3
• Displacement or based (accessing local variables)
• add r4,100(r3)
• r4 r4 M100r3

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Homework Problem 2.2

• Due on Monday

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So Far Weve Learned

• DLX loading words but addressing bytes
  arithmetic on registers only
• Instruction meaningadd r1, r2, r3 r1 r2
  r3sub r1, r2, r3 r1 r2 r3lw r1,
  100(r2) r1 memoryr2100 sw r1,
  100(r2) memoryr2100 r1

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Stored Program Concept

• Instructions are bits
• Programs are stored in memory to be read or
  written just like datafetch execute
  cycle
• Instructions are fetched and put into a special
  register
• Bits in the register "control" the subsequent
  actions
• Fetch the next instruction and continue

memory for data, programs, compilers, editors,
etc.
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Machine Language

• Instructions, like registers and words of data,
  are also 32 bits long
• Example add r8, r17,r18
• Instruction format 000000
  10001 10010 01000 00000100000 op rs rt
  rd funct
• Can you guess what the field names stand for?

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Machine Language

• Consider the load-word and store-word
  instructions,
• What would the regularity principle have us do?
• New principle good design demands a compromise
• Introduce a new type of instruction format
• I-type for data transfer instructions
• Other format was r-type for register
• Example lw r10, 32(r23) op rs rt 16
  bit number

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DlX
Register-Register
5
6
10
11
31
26
0
15
16
20
21
25
Op
Rs1
Rs2
Rd
Opx
Register-Immediate
31
26
0
15
16
20
21
25
immediate
Op
Rs1
Rd
Jump / Call
31
26
0
25
target
Op
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Assembly Language vs. Machine Language

• Assembly provides convenient symbolic
  representation
• much easier than writing down numbers
• e.g., destination first
• Machine language is the underlying reality
• e.g., destination is no longer first
• Assembly can provide 'pseudoinstructions'
• e.g., move t0, t1 exists only in Assembly
• would be implemented using add t0,t1,zero
• When considering performance you should count
  real instructions